projects
/
ieee754fpu.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
98f9872
)
add in TODO notes tying in SimdScope/SimdMode
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Fri, 22 Oct 2021 13:15:18 +0000
(14:15 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Fri, 22 Oct 2021 13:15:18 +0000
(14:15 +0100)
src/ieee754/part/partsig.py
patch
|
blob
|
history
diff --git
a/src/ieee754/part/partsig.py
b/src/ieee754/part/partsig.py
index 8818e185156a25391b94a45198f4163e8e606b8d..bc12d26e6805d2b87cb52caa972cd565517c061f 100644
(file)
--- a/
src/ieee754/part/partsig.py
+++ b/
src/ieee754/part/partsig.py
@@
-117,6
+117,11
@@
class SimdSignal(UserValue):
self.sig = Signal(*args, **kwargs)
width = len(self.sig) # get signal width
# create partition points
+ if False: # isinstance(mask, SimdMode):
+ self.ptype = ElwidPartType(self)
+ # parse the args, get elwid from SimdMode,
+ # get module as well, call self.set_module(mask.module)
+ self.partpoints = ptype.make_layout_get_stuff(mask, *args, **kwargs)
if isinstance(mask, PartitionPoints):
self.partpoints = mask
else: