no global variables in test suites

diff --git a/src/soc/fu/compunits/test/test_cr_compunit.py b/src/soc/fu/compunits/test/test_cr_compunit.py
index 47e32e02b217ff69dc6697546ca3d575400d8a2a..1312fb174dd7335be4c89b9ad6605f621fbef51b 100644 (file)
--- a/src/soc/fu/compunits/test/test_cr_compunit.py
+++ b/src/soc/fu/compunits/test/test_cr_compunit.py
@@ -4,7 +4,6 @@ from soc.decoder.power_enums import (XER_bits, Function)
 # XXX bad practice: use of global variables
 from soc.fu.cr.test.test_pipe_caller import get_cu_inputs
 from soc.fu.cr.test.test_pipe_caller import CRTestCase
-from soc.fu.cr.test.test_pipe_caller import test_data
 
 from soc.fu.compunits.compunits import CRFunctionUnit
 from soc.fu.compunits.test.test_compunit import TestRunner
@@ -56,7 +55,7 @@ class CRTestRunner(TestRunner):
 if __name__ == "__main__":
     unittest.main(exit=False)
     suite = unittest.TestSuite()
-    suite.addTest(CRTestRunner(test_data))
+    suite.addTest(CRTestRunner(CRTestCase.test_data))
 
     runner = unittest.TextTestRunner()
     runner.run(suite)

diff --git a/src/soc/fu/cr/test/test_pipe_caller.py b/src/soc/fu/cr/test/test_pipe_caller.py
index e066ff6a9288c006a93d0f6637be4f4518c34ba1..9fccbd2dec17f427c7e27bf94698d4214402f900 100644 (file)
--- a/src/soc/fu/cr/test/test_pipe_caller.py
+++ b/src/soc/fu/cr/test/test_pipe_caller.py
@@ -37,10 +37,9 @@ import random
 # massively. Before, it took around 1 minute on my computer, now it
 # takes around 3 seconds
 
-test_data = []
-
 
 class CRTestCase(FHDLTestCase):
+    test_data = []
     def __init__(self, name):
         super().__init__(name)
         self.test_name = name
@@ -49,7 +48,7 @@ class CRTestCase(FHDLTestCase):
                         initial_cr=0):
         tc = TestCase(prog, self.test_name,
                       regs=initial_regs, sprs=initial_sprs, cr=initial_cr)
-        test_data.append(tc)
+        self.test_data.append(tc)
 
     def test_crop(self):
         insns = ["crand", "cror", "crnand", "crnor", "crxor", "creqv",
@@ -286,7 +285,7 @@ class TestRunner(FHDLTestCase):
 if __name__ == "__main__":
     unittest.main(exit=False)
     suite = unittest.TestSuite()
-    suite.addTest(TestRunner(test_data))
+    suite.addTest(TestRunner(CRTestCase.test_data))
 
     runner = unittest.TextTestRunner()
     runner.run(suite)

diff --git a/src/soc/simple/test/test_core.py b/src/soc/simple/test/test_core.py
index 82d6d52bf6807633220909309dcc0a9a16d54367..7fc7767524f3fdc9e363614ccde905c57bd0f409 100644 (file)
--- a/src/soc/simple/test/test_core.py
+++ b/src/soc/simple/test/test_core.py
@@ -14,9 +14,10 @@ from soc.simple.core import NonProductionCore
 from soc.experiment.compalu_multi import find_ok # hack
 
 # test with ALU data and Logical data
-from soc.fu.alu.test.test_pipe_caller import TestCase, ALUTestCase
+from soc.fu.alu.test.test_pipe_caller import ALUTestCase
 from soc.fu.logical.test.test_pipe_caller import LogicalTestCase
 from soc.fu.shift_rot.test.test_pipe_caller import ShiftRotTestCase
+from soc.fu.cr.test.test_pipe_caller import CRTestCase
 
 
 def set_cu_input(cu, idx, data):
@@ -219,6 +220,7 @@ class TestRunner(FHDLTestCase):
 if __name__ == "__main__":
     unittest.main(exit=False)
     suite = unittest.TestSuite()
+    suite.addTest(TestRunner(CRTestCase.test_data))
     suite.addTest(TestRunner(ShiftRotTestCase.test_data))
     suite.addTest(TestRunner(LogicalTestCase.test_data))
     suite.addTest(TestRunner(ALUTestCase.test_data))