unit tests showing byte-reverse works

diff --git a/src/soc/fu/ldst/test/test_pipe_caller.py b/src/soc/fu/ldst/test/test_pipe_caller.py
index 25e72c02bc931cbfa3b697382c22939d0d334da5..247b0e061547703423f6f6b8e1fe3b1de01ae799 100644 (file)
--- a/src/soc/fu/ldst/test/test_pipe_caller.py
+++ b/src/soc/fu/ldst/test/test_pipe_caller.py
@@ -94,12 +94,54 @@ class LDSTTestCase(FHDLTestCase):
         lst = ["sth 4, 0(2)",
                "lhz 4, 0(2)"]
         initial_regs = [0] * 32
-        initial_regs[1] = 0x1004
-        initial_regs[2] = 0x1002
+        initial_regs[1] = 0x0004
+        initial_regs[2] = 0x0002
         initial_regs[3] = 0x15eb
-        initial_mem = {0x1000: (0x5432123412345678, 8),
-                       0x1008: (0xabcdef0187654321, 8),
-                       0x1020: (0x1828384822324252, 8),
+        initial_mem = {0x0000: (0x5432123412345678, 8),
+                       0x0008: (0xabcdef0187654321, 8),
+                       0x0020: (0x1828384822324252, 8),
+                        }
+        self.run_tst_program(Program(lst), initial_regs,
+                             initial_mem=initial_mem)
+
+    def test_4_load_store_rev_ext(self):
+        lst = ["stwx 1, 4, 2",
+               "lwbrx 3, 4, 2"]
+        initial_regs = [0] * 32
+        initial_regs[1] = 0x5678
+        initial_regs[2] = 0x001c
+        initial_regs[4] = 0x0008
+        initial_mem = {0x0000: (0x5432123412345678, 8),
+                       0x0008: (0xabcdef0187654321, 8),
+                       0x0020: (0x1828384822324252, 8),
+                        }
+        self.run_tst_program(Program(lst), initial_regs,
+                             initial_mem=initial_mem)
+
+    def test_5_load_store_rev_ext(self):
+        lst = ["stwbrx 1, 4, 2",
+               "lwzx 3, 4, 2"]
+        initial_regs = [0] * 32
+        initial_regs[1] = 0x5678
+        initial_regs[2] = 0x001c
+        initial_regs[4] = 0x0008
+        initial_mem = {0x0000: (0x5432123412345678, 8),
+                       0x0008: (0xabcdef0187654321, 8),
+                       0x0020: (0x1828384822324252, 8),
+                        }
+        self.run_tst_program(Program(lst), initial_regs,
+                             initial_mem=initial_mem)
+
+    def test_6_load_store_rev_ext(self):
+        lst = ["stwbrx 1, 4, 2",
+               "lwbrx 3, 4, 2"]
+        initial_regs = [0] * 32
+        initial_regs[1] = 0x5678
+        initial_regs[2] = 0x001c
+        initial_regs[4] = 0x0008
+        initial_mem = {0x0000: (0x5432123412345678, 8),
+                       0x0008: (0xabcdef0187654321, 8),
+                       0x0020: (0x1828384822324252, 8),
                         }
         self.run_tst_program(Program(lst), initial_regs,
                              initial_mem=initial_mem)