projects / ieee754fpu.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (from parent 1: 44a4843)
invert after all() not before
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 9 Feb 2020 18:41:34 +0000 (18:41 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 9 Feb 2020 18:41:34 +0000 (18:41 +0000)
src/ieee754/fpdiv/mulAddRecFN.py patch | blob | history

diff --git a/src/ieee754/fpdiv/mulAddRecFN.py b/src/ieee754/fpdiv/mulAddRecFN.py
index ca85f3da4e58fb0169193d61c7f448c2bf36b8c6..3432ccc155c645e5a02b2f3bcd7a1d2b25365c86 100644 (file)
--- a/src/ieee754/fpdiv/mulAddRecFN.py
+++ b/src/ieee754/fpdiv/mulAddRecFN.py
@@ -338,7 +338,7 @@ class mulAddRecFNToRaw_postMul(Elaboratable):
                     intermed_highAlignedSigC[(sigWidth + 1):sigWidth],
                     0b0))),
             CDom_absSigSumExtra.eq(Mux(doSubMags,
-                          ~(sigSum[1:sigWidth+1]).all()),
+                          ~(sigSum[1:sigWidth+1].all())),
                           sigSum[1:sigWidth + 2].bool())),
             CDom_mainSig.eq(
                 (CDom_absSigSum<<intermed_CDom_CAlignDist)>>(sigWidth - 3)),