fix fast slave bus index names

diff --git a/src/bsv/peripheral_gen/base.py b/src/bsv/peripheral_gen/base.py
index 413d15200e32014f2e1f1aed6f321892c0fa078a..c62a492a2451241207940f5fc213185a265c4626 100644 (file)
--- a/src/bsv/peripheral_gen/base.py
+++ b/src/bsv/peripheral_gen/base.py
@@ -122,10 +122,13 @@ class PBase(object):
         name = self.axi_slave_name(name, ifacenum, typ)
         return ("typedef {0} {1};".format(idx, name), 1)
 
-    def axi_addr_map(self, name, ifacenum):
+    def axi_fastaddr_map(self, name, ifacenum):
+        return self.axi_addr_map(name, ifacenum, 'fast')
+
+    def axi_addr_map(self, name, ifacenum, typ=""):
         bname = self.axibase(name, ifacenum)
         bend = self.axiend(name, ifacenum)
-        name = self.axi_slave_name(name, ifacenum)
+        name = self.axi_slave_name(name, ifacenum, typ)
         template = """\
 if(addr>=`{0} && addr<=`{1})
     return tuple2(True,fromInteger(valueOf({2})));
@@ -320,16 +323,12 @@ typedef TAdd#(BootRom_slave_num  ,`ifdef Debug      1 `else 0 `endif )
                 Debug_slave_num ;
 typedef  TAdd#(Debug_slave_num   , `ifdef TCMemory  1 `else 0 `endif )
                 TCM_slave_num;
-typedef  TAdd#(TCM_slave_num     ,`ifdef DMA            1 `else 0 `endif )
+typedef  TAdd#(TCM_slave_num     ,`ifdef DMA        1 `else 0 `endif )
                 Dma_slave_num;
 typedef  TAdd#(Dma_slave_num      ,1 )      SlowPeripheral_slave_num;
 typedef  TAdd#(SlowPeripheral_slave_num,`ifdef VME  1 `else 0 `endif )
                 VME_slave_num;
-typedef  TAdd#(VME_slave_num,`ifdef FlexBus 1 `else 0 `endif )
-                FlexBus_slave_num;
-typedef TAdd#(FlexBus_slave_num,1)
-                Num_Slaves;
-
+typedef TAdd#(VME_slave_num,1) Num_Fast_Slaves;
 """
 
 axi_slave_declarations = """\
@@ -407,6 +406,11 @@ class PeripheralIface(object):
             return ('', 0)
         return self.slow.axi_slave_idx(start, self.ifacename, count, typ)
 
+    def axi_fastaddr_map(self, count):
+        if not self.slow:
+            return ''
+        return self.slow.axi_fastaddr_map(self.ifacename, count)
+
     def axi_addr_map(self, count):
         if not self.slow:
             return ''
@@ -541,6 +545,15 @@ class PeripheralInterfaces(object):
         return self._axi_num_idx(0, axi_fastslave_declarations, 'fastslave',
                                  'fast', *args)
 
+    def axi_fastaddr_map(self, *args):
+        ret = []
+        for (name, count) in self.ifacecount:
+            for i in range(count):
+                if self.is_on_fastbus(name, i):
+                    continue
+                ret.append(self.data[name].axi_fastaddr_map(i))
+        return '\n'.join(li(list(filter(None, ret)), 8))
+
     def axi_addr_map(self, *args):
         ret = []
         for (name, count) in self.ifacecount:

diff --git a/src/bsv/peripheral_gen/jtag.py b/src/bsv/peripheral_gen/jtag.py
index dd3e2fa10f4043062e6005295c8d59a21953abbe..2016b0b6c13617022647642540a9c96c82937600 100644 (file)
--- a/src/bsv/peripheral_gen/jtag.py
+++ b/src/bsv/peripheral_gen/jtag.py
@@ -25,11 +25,11 @@ rule drive_tmp_scan_outs;
 endrule
 """
 
-    def axi_slave_name(self, name, ifacenum, typ=''):
+    def axi_slave_name(self, name, ifacenum, typ=None):
         return ''
 
     def axi_slave_idx(self, idx, name, ifacenum, typ):
         return ('', 0)
 
-    def axi_addr_map(self, name, ifacenum):
+    def axi_addr_map(self, name, ifacenum, typ=None):
         return ''

diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py
index 4f029a7200bf8b2413731f4bc04393778034b876..1589468ab324bc463022e667cfd2745c60c8235c 100644 (file)
--- a/src/bsv/pinmux_generator.py
+++ b/src/bsv/pinmux_generator.py
@@ -148,7 +148,7 @@ def write_soc(soc, soct, fastmf, fastmt, p, ifaces, iocells):
     regdef = ifaces.axi_fastmem_def()
     slavedecl = ifaces.axi_fastslave_idx()
     mastdecl = ifaces.axi_master_idx()
-    fnaddrmap = ifaces.axi_addr_map()
+    fnaddrmap = ifaces.axi_fastaddr_map()
     mkfast = ifaces.mkfast_peripheral()
     mkcon = ifaces.mk_fast_connection()
     mkcellcon = ifaces.mk_cellconn()