CHIPSET(0x15DD, RAVEN)
CHIPSET(0x15D8, RAVEN)
+CHIPSET(0x738C, ARCTURUS)
+CHIPSET(0x7388, ARCTURUS)
+CHIPSET(0x738E, ARCTURUS)
+
CHIPSET(0x7310, NAVI10)
CHIPSET(0x7312, NAVI10)
CHIPSET(0x7318, NAVI10)
#define AMDGPU_RAVEN_RANGE 0x01, 0x81
#define AMDGPU_RAVEN2_RANGE 0x81, 0xFF
+#define AMDGPU_ARCTURUS_RANGE 0x32, 0xFF
+
#define AMDGPU_NAVI10_RANGE 0x01, 0x0A
#define AMDGPU_NAVI12_RANGE 0x0A, 0x14
#define AMDGPU_NAVI14_RANGE 0x14, 0x28
#define ASICREV_IS_RAVEN(r) ASICREV_IS(r, RAVEN)
#define ASICREV_IS_RAVEN2(r) ASICREV_IS(r, RAVEN2)
+#define ASICREV_IS_ARCTURUS(r) ASICREV_IS(r, ARCTURUS)
+
#define ASICREV_IS_NAVI10_P(r) ASICREV_IS(r, NAVI10)
#define ASICREV_IS_NAVI12(r) ASICREV_IS(r, NAVI12)
#define ASICREV_IS_NAVI14(r) ASICREV_IS(r, NAVI14)