/* The max number of bytes that can be copied per packet. */
static inline unsigned cp_dma_max_byte_count(struct radv_cmd_buffer *cmd_buffer)
{
- unsigned max = S_414_BYTE_COUNT_GFX6(~0u);
+ unsigned max = cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9 ?
+ S_414_BYTE_COUNT_GFX9(~0u) :
+ S_414_BYTE_COUNT_GFX6(~0u);
/* make it aligned for optimal performance */
return max & ~(SI_CPDMA_ALIGNMENT - 1);
assert(size <= cp_dma_max_byte_count(cmd_buffer));
radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 9);
-
- command |= S_414_BYTE_COUNT_GFX6(size);
+ if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9)
+ command |= S_414_BYTE_COUNT_GFX9(size);
+ else
+ command |= S_414_BYTE_COUNT_GFX6(size);
/* Sync flags. */
if (flags & CP_DMA_SYNC)
header |= S_411_CP_SYNC(1);
else {
- command |= S_414_DISABLE_WR_CONFIRM_GFX6(1);
+ if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9)
+ command |= S_414_DISABLE_WR_CONFIRM_GFX9(1);
+ else
+ command |= S_414_DISABLE_WR_CONFIRM_GFX6(1);
}
if (flags & CP_DMA_RAW_WAIT)
command |= S_414_RAW_WAIT(1);
/* Src and dst flags. */
- if (flags & CP_DMA_USE_L2)
+ if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9 &&
+ !(flags & CP_DMA_CLEAR) &&
+ src_va == dst_va)
+ header |= S_411_DSL_SEL(V_411_NOWHERE); /* prefetch only */
+ else if (flags & CP_DMA_USE_L2)
header |= S_411_DSL_SEL(V_411_DST_ADDR_TC_L2);
if (flags & CP_DMA_CLEAR)