move CompLDSTOpSubset to fu.ldst.ldst_input_record
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 21 May 2020 17:52:43 +0000 (18:52 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 21 May 2020 17:52:51 +0000 (18:52 +0100)
src/soc/experiment/compldst_multi.py
src/soc/fu/ldst/__init__.py [new file with mode: 0644]
src/soc/fu/ldst/ldst_input_record.py [new file with mode: 0644]

index edc2bed10e03f04837f82a0192c707040c67c3fa..ae33665c1f265be12123ec532ce2ad8654a4ded4 100644 (file)
@@ -82,57 +82,9 @@ from nmutil.latch import SRLatch, latchregister
 from soc.experiment.compalu_multi import go_record, CompUnitRecord
 from soc.experiment.l0_cache import PortInterface
 from soc.experiment.testmem import TestMemory
-from soc.decoder.power_enums import InternalOp
 
 from soc.decoder.power_enums import InternalOp, Function
-
-
-class CompLDSTOpSubset(Record):
-    """CompLDSTOpSubset
-
-    a copy of the relevant subset information from Decode2Execute1Type
-    needed for LD/ST operations.  use with eq_from_execute1 (below) to
-    grab subsets.
-    """
-    def __init__(self, name=None):
-        layout = (('insn_type', InternalOp),
-                  ('imm_data', Layout((("imm", 64), ("imm_ok", 1)))),
-                  ('is_32bit', 1),
-                  ('is_signed', 1),
-                  ('data_len', 4), # TODO: should be in separate CompLDSTSubset
-                  ('byte_reverse', 1),
-                  ('sign_extend', 1),
-                  ('update', 1))
-
-        Record.__init__(self, Layout(layout), name=name)
-
-        # grrr.  Record does not have kwargs
-        self.insn_type.reset_less = True
-        self.is_32bit.reset_less = True
-        self.is_signed.reset_less = True
-        self.data_len.reset_less = True
-        self.byte_reverse.reset_less = True
-        self.sign_extend.reset_less = True
-        self.update.reset_less = True
-
-    def eq_from_execute1(self, other):
-        """ use this to copy in from Decode2Execute1Type
-        """
-        res = []
-        for fname, sig in self.fields.items():
-            eqfrom = other.fields[fname]
-            res.append(sig.eq(eqfrom))
-        return res
-
-    def ports(self):
-        return [self.insn_type,
-                self.is_32bit,
-                self.is_signed,
-                self.data_len,
-                self.byte_reverse,
-                self.sign_extend,
-                self.update,
-        ]
+from fu.ldst.ldst_input_record import CompLDSTOpSubset
 
 
 class LDSTCompUnitRecord(CompUnitRecord):
diff --git a/src/soc/fu/ldst/__init__.py b/src/soc/fu/ldst/__init__.py
new file mode 100644 (file)
index 0000000..e69de29
diff --git a/src/soc/fu/ldst/ldst_input_record.py b/src/soc/fu/ldst/ldst_input_record.py
new file mode 100644 (file)
index 0000000..33341b9
--- /dev/null
@@ -0,0 +1,52 @@
+from nmigen.hdl.rec import Record, Layout
+
+from soc.decoder.power_enums import InternalOp, Function
+
+
+class CompLDSTOpSubset(Record):
+    """CompLDSTOpSubset
+
+    a copy of the relevant subset information from Decode2Execute1Type
+    needed for LD/ST operations.  use with eq_from_execute1 (below) to
+    grab subsets.
+    """
+    def __init__(self, name=None):
+        layout = (('insn_type', InternalOp),
+                  ('imm_data', Layout((("imm", 64), ("imm_ok", 1)))),
+                  ('is_32bit', 1),
+                  ('is_signed', 1),
+                  ('data_len', 4),
+                  ('byte_reverse', 1),
+                  ('sign_extend', 1),
+                  ('update', 1))
+
+        Record.__init__(self, Layout(layout), name=name)
+
+        # grrr.  Record does not have kwargs
+        self.insn_type.reset_less = True
+        self.is_32bit.reset_less = True
+        self.is_signed.reset_less = True
+        self.data_len.reset_less = True
+        self.byte_reverse.reset_less = True
+        self.sign_extend.reset_less = True
+        self.update.reset_less = True
+
+    def eq_from_execute1(self, other):
+        """ use this to copy in from Decode2Execute1Type
+        """
+        res = []
+        for fname, sig in self.fields.items():
+            eqfrom = other.fields[fname]
+            res.append(sig.eq(eqfrom))
+        return res
+
+    def ports(self):
+        return [self.insn_type,
+                self.is_32bit,
+                self.is_signed,
+                self.data_len,
+                self.byte_reverse,
+                self.sign_extend,
+                self.update,
+        ]
+