add setvl to decoder

diff --git a/src/soc/decoder/power_decoder.py b/src/soc/decoder/power_decoder.py
index 268a1ef100891740171631151c36b9ac6825822f..239541424497c6cc95014f4fa46ff2d2c975065e 100644 (file)
--- a/src/soc/decoder/power_decoder.py
+++ b/src/soc/decoder/power_decoder.py
@@ -557,6 +557,8 @@ def create_pdecode(name=None, col_subset=None, row_subset=None):
                    opint=True, bitsel=(0, 2), suffix=None, subdecoders=[]),
         Subdecoder(pattern=62, opcodes=get_csv("minor_62.csv"),
                    opint=True, bitsel=(0, 2), suffix=None, subdecoders=[]),
+        Subdecoder(pattern=22, opcodes=get_csv("minor_22.csv"),
+                   opint=True, bitsel=(1, 5), suffix=None, subdecoders=[]),
     ]
 
     # top level: extra merged with major

diff --git a/src/soc/decoder/power_enums.py b/src/soc/decoder/power_enums.py
index b8c7fe46e398a877b5ced68a7da23476174067c6..faa8cfc1c9ee827b7cd4480e1f29d8a5bde612c1 100644 (file)
--- a/src/soc/decoder/power_enums.py
+++ b/src/soc/decoder/power_enums.py
@@ -81,6 +81,7 @@ class Function(Enum):
     SPR = 1 << 10
     MMU = 1 << 11
     SV = 1 << 12  # Simple-V https://libre-soc.org/openpower/sv
+    VL = 1 << 13  # setvl
 
 
 @unique