attempting pwm compile

diff --git a/src/bsv/bsv_lib/ConcatReg.bsv b/src/bsv/bsv_lib/ConcatReg.bsv
new file mode 100644 (file)
index 0000000..3020e05
--- /dev/null
+++ b/src/bsv/bsv_lib/ConcatReg.bsv
@@ -0,0 +1,419 @@
+/*
+Copyright (c) 2013, IIT Madras
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
+
+*  Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
+*  Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
+*  Neither the name of IIT Madras  nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+*/
+
+// Copyright (c) 2016 Massachusetts Institute of Technology
+
+// Permission is hereby granted, free of charge, to any person
+// obtaining a copy of this software and associated documentation
+// files (the "Software"), to deal in the Software without
+// restriction, including without limitation the rights to use, copy,
+// modify, merge, publish, distribute, sublicense, and/or sell copies
+// of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+
+// The above copyright notice and this permission notice shall be
+// included in all copies or substantial portions of the Software.
+
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+// NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+// ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+// CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+
+// This file was created by gen_ConcatReg.py. If you want to modify this file,
+// please modify gen_ConcatReg.py instead. If you need a wider concatReg
+// function, change the value of n in gen_ConcatReg.py and run it again.
+
+// The Bluespec provided BuildVector.bsv provides another example of
+// constructing a function that takes a variable number of arguments
+
+// Typeclass for creating _concatReg with a variable number of arguments.
+typeclass ConcatReg#(type r, numeric type n1, numeric type n2)
+  dependencies ((r,n1) determines n2, (r,n2) determines n1);
+  // dependencies (r determines (n1,n2));
+  function r _concatReg(Reg#(Bit#(n1)) r1, Reg#(Bit#(n2)) r2);
+endtypeclass
+// Base case
+instance ConcatReg#(Reg#(Bit#(n3)), n1, n2) provisos (Add#(n1, n2, n3));
+  function Reg#(Bit#(TAdd#(n1,n2))) _concatReg(Reg#(Bit#(n1)) r1, Reg#(Bit#(n2)) r2);
+    return (interface Reg;
+        method Bit#(TAdd#(n1,n2)) _read = {r1._read, r2._read};
+        method Action _write(Bit#(TAdd#(n1,n2)) x);
+          r1._write(truncateLSB(x));
+          r2._write(truncate(x));
+        endmethod
+      endinterface);
+  endfunction
+endinstance
+// Recursion
+instance ConcatReg#(function r f(Reg#(Bit#(n3)) r3), n1, n2) provisos (ConcatReg#(r, TAdd#(n1, n2), n3));
+  function function r f(Reg#(Bit#(n3)) r3) _concatReg(Reg#(Bit#(n1)) r1, Reg#(Bit#(n2)) r2);
+    return _concatReg(interface Reg;
+        method Bit#(TAdd#(n1,n2)) _read = {r1._read, r2._read};
+        method Action _write(Bit#(TAdd#(n1,n2)) x);
+          r1._write(truncateLSB(x));
+          r2._write(truncate(x));
+        endmethod
+      endinterface);
+  endfunction
+endinstance
+  
+function Reg#(t) readOnlyReg(t r);
+  return (interface Reg;
+    method t _read = r;
+    method Action _write(t x) = noAction;
+    endinterface);
+endfunction
+
+// Wrapper function for users. This can take a variable number of arguments.
+// You will need to use asReg() for the third argument and beyond.
+function r concatReg(Reg#(Bit#(n1)) r1, Reg#(Bit#(n2)) r2) provisos(ConcatReg#(r, n1, n2));
+  return _concatReg(asReg(r1),asReg(r2));
+endfunction
+
+// Automatically generated macros with a set number of registers.
+// These don't require asReg when used.
+function Reg#(Bit#(n)) concatReg2(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2
+    ) provisos (
+      Add#(n1,n2,n)
+    );
+  return concatReg(asReg(r1),asReg(r2));
+endfunction
+
+function Reg#(Bit#(n)) concatReg3(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3
+    ) provisos (
+      Add#(TAdd#(n1,n2),n3,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3));
+endfunction
+
+function Reg#(Bit#(n)) concatReg4(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4
+    ) provisos (
+      Add#(TAdd#(TAdd#(n1,n2),n3),n4,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4));
+endfunction
+
+function Reg#(Bit#(n)) concatReg5(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5));
+endfunction
+
+function Reg#(Bit#(n)) concatReg6(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6));
+endfunction
+
+function Reg#(Bit#(n)) concatReg7(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7));
+endfunction
+
+function Reg#(Bit#(n)) concatReg8(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8));
+endfunction
+
+function Reg#(Bit#(n)) concatReg9(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8,
+      Reg#(Bit#(n9)) r9
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8),n9,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8),asReg(r9));
+endfunction
+
+function Reg#(Bit#(n)) concatReg10(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8,
+      Reg#(Bit#(n9)) r9,
+      Reg#(Bit#(n10)) r10
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8),n9),n10,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8),asReg(r9),asReg(r10));
+endfunction
+
+function Reg#(Bit#(n)) concatReg11(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8,
+      Reg#(Bit#(n9)) r9,
+      Reg#(Bit#(n10)) r10,
+      Reg#(Bit#(n11)) r11
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8),n9),n10),n11,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8),asReg(r9),asReg(r10),asReg(r11));
+endfunction
+
+function Reg#(Bit#(n)) concatReg12(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8,
+      Reg#(Bit#(n9)) r9,
+      Reg#(Bit#(n10)) r10,
+      Reg#(Bit#(n11)) r11,
+      Reg#(Bit#(n12)) r12
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8),n9),n10),n11),n12,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8),asReg(r9),asReg(r10),asReg(r11),asReg(r12));
+endfunction
+
+function Reg#(Bit#(n)) concatReg13(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8,
+      Reg#(Bit#(n9)) r9,
+      Reg#(Bit#(n10)) r10,
+      Reg#(Bit#(n11)) r11,
+      Reg#(Bit#(n12)) r12,
+      Reg#(Bit#(n13)) r13
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8),n9),n10),n11),n12),n13,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8),asReg(r9),asReg(r10),asReg(r11),asReg(r12),asReg(r13));
+endfunction
+
+function Reg#(Bit#(n)) concatReg14(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8,
+      Reg#(Bit#(n9)) r9,
+      Reg#(Bit#(n10)) r10,
+      Reg#(Bit#(n11)) r11,
+      Reg#(Bit#(n12)) r12,
+      Reg#(Bit#(n13)) r13,
+      Reg#(Bit#(n14)) r14
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8),n9),n10),n11),n12),n13),n14,n)
+    );
+  return concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8),asReg(r9),asReg(r10),asReg(r11),asReg(r12),asReg(r13),asReg(r14));
+endfunction
+
+function Reg#(Bit#(n)) concatReg24(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8,
+      Reg#(Bit#(n9)) r9,
+      Reg#(Bit#(n10)) r10,
+      Reg#(Bit#(n11)) r11,
+      Reg#(Bit#(n12)) r12,
+      Reg#(Bit#(n13)) r13,
+      Reg#(Bit#(n14)) r14,
+      Reg#(Bit#(n15)) r15,
+      Reg#(Bit#(n16)) r16,
+      Reg#(Bit#(n17)) r17,
+      Reg#(Bit#(n18)) r18,
+      Reg#(Bit#(n19)) r19,
+      Reg#(Bit#(n20)) r20,
+      Reg#(Bit#(n21)) r21,
+      Reg#(Bit#(n22)) r22,
+      Reg#(Bit#(n23)) r23,
+      Reg#(Bit#(n24)) r24
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8),n9),n10),n11),n12),n13),n14),n15),n16),n17),n18),n19),n20),n21),n22),n23),n24,n)
+    );
+  return
+   concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8),asReg(r9),asReg(r10),asReg(r11),asReg(r12),asReg(r13),asReg(r14),asReg(r15),asReg(r16),asReg(r17),asReg(r18),asReg(r19),asReg(r20),asReg(r21),asReg(r22),asReg(r23),asReg(r24));
+endfunction
+
+function Reg#(Bit#(n)) concatReg20(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8,
+      Reg#(Bit#(n9)) r9,
+      Reg#(Bit#(n10)) r10,
+      Reg#(Bit#(n11)) r11,
+      Reg#(Bit#(n12)) r12,
+      Reg#(Bit#(n13)) r13,
+      Reg#(Bit#(n14)) r14,
+      Reg#(Bit#(n15)) r15,
+      Reg#(Bit#(n16)) r16,
+      Reg#(Bit#(n17)) r17,
+      Reg#(Bit#(n18)) r18,
+      Reg#(Bit#(n19)) r19,
+      Reg#(Bit#(n20)) r20
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8),n9),n10),n11),n12),n13),n14),n15),n16),n17),n18),n19),n20,n)
+    );
+  return
+   concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8),asReg(r9),asReg(r10),asReg(r11),asReg(r12),asReg(r13),asReg(r14),asReg(r15),asReg(r16),asReg(r17),asReg(r18),asReg(r19),asReg(r20));
+endfunction
+
+function Reg#(Bit#(n)) concatReg18(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8,
+      Reg#(Bit#(n9)) r9,
+      Reg#(Bit#(n10)) r10,
+      Reg#(Bit#(n11)) r11,
+      Reg#(Bit#(n12)) r12,
+      Reg#(Bit#(n13)) r13,
+      Reg#(Bit#(n14)) r14,
+      Reg#(Bit#(n15)) r15,
+      Reg#(Bit#(n16)) r16,
+      Reg#(Bit#(n17)) r17,
+      Reg#(Bit#(n18)) r18
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8),n9),n10),n11),n12),n13),n14),n15),n16),n17),n18,n)
+    );
+  return
+   concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8),asReg(r9),asReg(r10),asReg(r11),asReg(r12),asReg(r13),asReg(r14),asReg(r15),asReg(r16),asReg(r17),asReg(r18));
+endfunction
+
+function Reg#(Bit#(n)) concatReg16(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8,
+      Reg#(Bit#(n9)) r9,
+      Reg#(Bit#(n10)) r10,
+      Reg#(Bit#(n11)) r11,
+      Reg#(Bit#(n12)) r12,
+      Reg#(Bit#(n13)) r13,
+      Reg#(Bit#(n14)) r14,
+      Reg#(Bit#(n15)) r15,
+      Reg#(Bit#(n16)) r16
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8),n9),n10),n11),n12),n13),n14),n15),n16,n)
+    );
+  return
+   concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8),asReg(r9),asReg(r10),asReg(r11),asReg(r12),asReg(r13),asReg(r14),asReg(r15),asReg(r16));
+endfunction
+function Reg#(Bit#(n)) concatReg19(
+      Reg#(Bit#(n1)) r1,
+      Reg#(Bit#(n2)) r2,
+      Reg#(Bit#(n3)) r3,
+      Reg#(Bit#(n4)) r4,
+      Reg#(Bit#(n5)) r5,
+      Reg#(Bit#(n6)) r6,
+      Reg#(Bit#(n7)) r7,
+      Reg#(Bit#(n8)) r8,
+      Reg#(Bit#(n9)) r9,
+      Reg#(Bit#(n10)) r10,
+      Reg#(Bit#(n11)) r11,
+      Reg#(Bit#(n12)) r12,
+      Reg#(Bit#(n13)) r13,
+      Reg#(Bit#(n14)) r14,
+      Reg#(Bit#(n15)) r15,
+      Reg#(Bit#(n16)) r16,
+      Reg#(Bit#(n17)) r17,
+      Reg#(Bit#(n18)) r18,
+      Reg#(Bit#(n19)) r19
+    ) provisos (
+      Add#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(TAdd#(n1,n2),n3),n4),n5),n6),n7),n8),n9),n10),n11),n12),n13),n14),n15),n16),n17),n18),n19,n)
+    );
+  return
+   concatReg(asReg(r1),asReg(r2),asReg(r3),asReg(r4),asReg(r5),asReg(r6),asReg(r7),asReg(r8),asReg(r9),asReg(r10),asReg(r11),asReg(r12),asReg(r13),asReg(r14),asReg(r15),asReg(r16),asReg(r17),asReg(r18),asReg(r19));
+endfunction

diff --git a/src/bsv/bsv_lib/pwm.bsv b/src/bsv/bsv_lib/pwm.bsv
index f0af291a8f82bc0cdb8e3fb3991a1fea9a9c3298..42bcbdea238d71c5b90adb87bba7e67109c7814b 100644 (file)
--- a/src/bsv/bsv_lib/pwm.bsv
+++ b/src/bsv/bsv_lib/pwm.bsv
@@ -36,8 +36,8 @@ package pwm;
   import Clocks::*;
   /*======================*/
   /*== Package imports ==*/
-  import defined_types::*;
-  `include "defined_parameters.bsv"
+  //import defined_types::*;
+  `include "instance_defines.bsv"
   import ClockDiv::*;
   import ConcatReg::*;
        import Semi_FIFOF::*;
@@ -64,8 +64,8 @@ package pwm;
     interface PWMIO io;
   endinterface
 
-  (*synthesize*)
-  module mkPWM#(Clock ext_clock, numeric type pwmnum)(PWM);
+  //(*synthesize*)
+  module mkPWM#(Clock ext_clock, numeric pwmnum_)(PWM);
 
     let pwmnum = valueOf(pwmnum_);
 
@@ -268,8 +268,8 @@ package pwm;
                                         `USERSPACE) axi4_slave;
     endinterface
 
-    (*synthesize*)
-    module mkPWM_bus#(Clock ext_clock, numeric type pwmnum)(Ifc_PWM_bus);
+    //(*synthesize*)
+    module mkPWM_bus#(Clock ext_clock, numeric pwmnum)(Ifc_PWM_bus);
       PWM pwm <-mkPWM(ext_clock, pwmnum);
                AXI4_Lite_Slave_Xactor_IFC#(`PADDR,`Reg_width, `USERSPACE)
                                     s_xactor<-mkAXI4_Lite_Slave_Xactor();
@@ -336,6 +336,7 @@ package pwm;
       interface pwm_io = pwm.io;
     endmodule
   `endif
+  `ifdef PWM_TEST
   (*synthesize*)
   module mkTb(Empty);
     let clk <- exposeCurrentClock;
@@ -359,4 +360,5 @@ package pwm;
       let x <- pwm.user.write(8,'b0001_0110);
     endrule
   endmodule
+  `endif
 endpackage