projects
/
soc.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
b7aad51
)
add TLB elaboratable
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Wed, 24 Jul 2019 21:47:32 +0000
(22:47 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Wed, 24 Jul 2019 21:47:32 +0000
(22:47 +0100)
src/TLB/ariane/tlb.py
patch
|
blob
|
history
diff --git
a/src/TLB/ariane/tlb.py
b/src/TLB/ariane/tlb.py
index 1f1fa86c5abe419a926f7cc7ca4058af40c061df..6a29cf617243e27cb3a9914a351e5879e15dea7e 100644
(file)
--- a/
src/TLB/ariane/tlb.py
+++ b/
src/TLB/ariane/tlb.py
@@
-25,7
+25,7
@@
Online simulator:
http://www.ntu.edu.sg/home/smitha/ParaCache/Paracache/vm.html
"""
from math import log2
-from nmigen import Signal, Module, Cat, Const, Array
+from nmigen import Signal, Module, Cat, Const, Array
, Elaboratable
from nmigen.cli import verilog, rtlil
from nmigen.lib.coding import Encoder
@@
-35,7
+35,7
@@
from TLB.ariane.tlb_content import TLBContent
TLB_ENTRIES = 8
-class TLB:
+class TLB
(Elaboratable)
:
def __init__(self, tlb_entries=8, asid_width=8):
self.tlb_entries = tlb_entries
self.asid_width = asid_width