note a way to see if an exception happened, in TestIssuer

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index a78eb0744d280815047cbcada42793cc9615a90b..21cf3fe5acb9245d689a52d7bfa0c05ae579d3ad 100644 (file)
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -594,6 +594,15 @@ class TestIssuerInternal(Elaboratable):
         comb += next_srcstep.eq(cur_state.svstate.srcstep+1)
         comb += next_dststep.eq(cur_state.svstate.dststep+1)
 
+        # note if an exception happened.  in a pipelined or OoO design
+        # this needs to be accompanied by "shadowing" (or stalling)
+        el = []
+        for exc in core.fus.excs.values():
+            el.append(exc.happened)
+        exc_happened = Signal()
+        if len(el) > 0: # at least one exception
+            comb += exc.happened.eq(Cat(*el).bool())
+
         with m.FSM(name="issue_fsm"):
 
             # sync with the "fetch" phase which is reading the instruction