work out how to initialise memory directly

diff --git a/src/soc/fu/compunits/test/test_compunit.py b/src/soc/fu/compunits/test/test_compunit.py
index 602a99843a6e563e51b93084bbbd98ee4892535d..5e6fe2e97563b50a837f32b9ae4d66f685408b08 100644 (file)
--- a/src/soc/fu/compunits/test/test_compunit.py
+++ b/src/soc/fu/compunits/test/test_compunit.py
@@ -1,4 +1,4 @@
-from nmigen import Module, Signal
+from nmigen import Module, Signal, ResetSignal
 from nmigen.back.pysim import Simulator, Delay, Settle
 from nmutil.formaltest import FHDLTestCase
 from nmigen.cli import rtlil
@@ -151,8 +151,7 @@ class TestRunner(FHDLTestCase):
                     mem = l0.mem.mem
                     memlist = []
                     for i in range(mem.depth):
-                        memlist.append(sim.mem.ld(i*8, 8))
-                    mem.init = memlist
+                        yield mem._array[i].eq(sim.mem.ld(i*8, 8))
                     print (mem, mem.depth, mem.width)
                     print ("mem init", list(map(hex,memlist)))