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author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Thu, 16 Apr 2020 14:46:02 +0000
(15:46 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Thu, 16 Apr 2020 14:46:02 +0000
(15:46 +0100)
src/nmutil/picker.py
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diff --git
a/src/nmutil/picker.py
b/src/nmutil/picker.py
index 4ff5e57e41b270c10973bb89eb2adc98330f7445..717a6e56a457e72fc00139b3ffbff30b0471aedf 100644
(file)
--- a/
src/nmutil/picker.py
+++ b/
src/nmutil/picker.py
@@
-23,6
+23,7
@@
from nmigen import Module, Signal, Cat, Elaboratable, Array, Const, Mux
from nmigen.cli import verilog, rtlil
import math
+
class PriorityPicker(Elaboratable):
""" implements a priority-picker. input: N bits, output: N bits
"""