investigating CR mtocrf / mfocrf

diff --git a/src/soc/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py
index 0f2a48601d2c02f42fdca87be406745180168fc0..b16a30d068ef63127685d8404a8f687ed32a076c 100644 (file)
--- a/src/soc/decoder/power_decoder2.py
+++ b/src/soc/decoder/power_decoder2.py
@@ -489,7 +489,8 @@ class DecodeCRIn(Elaboratable):
 
     def elaborate(self, platform):
         m = Module()
-        m.submodules.ppick = ppick = PriorityPicker(8)#reverse_i=True)
+        m.submodules.ppick = ppick = PriorityPicker(8, reverse_i=True,
+                                                       reverse_o=True)
 
         comb = m.d.comb
         op = self.dec.op

diff --git a/src/soc/decoder/selectable_int.py b/src/soc/decoder/selectable_int.py
index 2811a9595ddfff211e1c6acc0aefc66b421fae24..575d1d8713d9fbbd8897cf4dc05ea5018e20161b 100644 (file)
--- a/src/soc/decoder/selectable_int.py
+++ b/src/soc/decoder/selectable_int.py
@@ -298,7 +298,7 @@ class SelectableInt:
     def __setitem__(self, key, value):
         if isinstance(key, SelectableInt):
             key = key.value
-        print("setitem", key, self.bits, hex(self.value), hex(value.value))
+        print("setitem", key, self.bits, hex(self.value))
         if isinstance(key, int):
             assert key < self.bits
             assert key >= 0

diff --git a/src/soc/litex/florent/sim.py b/src/soc/litex/florent/sim.py
index 3b693fda76cf6d9833103cfd4b27f504a5028f54..b0fd474eaf0b6e0de3d0fdd32bc49fd36a9686b9 100755 (executable)
--- a/src/soc/litex/florent/sim.py
+++ b/src/soc/litex/florent/sim.py
@@ -50,6 +50,7 @@ class LibreSoCSim(SoCSDRAM):
         #            "hello_world/hello_world.bin"
         ram_fname = "/home/lkcl/src/libresoc/microwatt/" \
                     "tests/1.bin"
+        #ram_fname = "/tmp/test.bin"
         #ram_fname = None
 
         ram_init = []
@@ -289,7 +290,7 @@ class LibreSoCSim(SoCSDRAM):
         )
 
         if cpu == "libresoc":
-            self.comb += active_dbg_cr.eq((0x10300 <= pc) & (pc <= 0x105ec))
+            self.comb += active_dbg_cr.eq((0x10300 <= pc) & (pc <= 0x1094c))
             #self.comb += active_dbg_cr.eq(1)
 
             # get the CR