more hint/comments

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index e5ece6decc5a5ed8073bae5b2fc156dc5490686f..3e7cd22b1ca6d0d9875c4f5bfa824654eb2b56b9 100644 (file)
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -272,7 +272,8 @@ class TestIssuerInternal(Elaboratable):
         or CRRegs r_ports['pred'].  in the case of CRs it will have to
         be done through multiple reads, extracting one relevant at a time.
         later, a faster way would be to use the 32-bit-wide CR port but
-        this is more complex decoding, here.
+        this is more complex decoding, here.  equivalent code used in
+        ISACaller is "from soc.decoder.isa.caller import get_predcr"
         """
         comb = m.d.comb
         sync = m.d.sync