# write_requests all done
wr_any = Signal(reset_less=True)
req_done = Signal(reset_less=True)
- m.d.comb += self.done_o.eq(~(self.req_rel_o.bool())
+ m.d.comb += self.done_o.eq(~(self.req_rel_o.bool()))
m.d.comb += wr_any.eq(self.go_wr_i.bool())
m.d.comb += req_done.eq(self.done_o & rst_l.q & wr_any)
from soc.scoreboard.memfu import MemFunctionUnits
from soc.experiment.compalu import ComputationUnitNoDelay
+from soc.experiment.compalu_multi import ComputationUnitNoDelay as MultiCompUnit
from soc.experiment.compldst import LDSTCompUnit
from soc.experiment.testmem import TestMemory
units = []
for alu in alus:
aluopwid = 3 # extra bit for immediate mode
- units.append(ComputationUnitNoDelay(rwid, alu))
+ units.append(MultiCompUnit(rwid, alu))
CompUnitsBase.__init__(self, rwid, units)