adjust minitest layout

diff --git a/src/spec/interfaces.py b/src/spec/interfaces.py
index 194cf909228bb789d67a540eddf7b4413d248842..ca57fd07214dcc5d066316f7cd6b88ab570bccd1 100644 (file)
--- a/src/spec/interfaces.py
+++ b/src/spec/interfaces.py
@@ -136,13 +136,13 @@ class Pinouts(object):
                     spec, origsuffix=suffix)
         self.pinmerge(pins)
 
-    def rgbttl(self, suffix, offs, bank, mux=1, spec=None):
+    def rgbttl(self, suffix, offs, bank, mux=1, spec=None, limit=None):
         ttlpins = ['CK+', 'DE+', 'HS+', 'VS+']
         for i in range(24):
             ttlpins.append("D%d+" % i)
         pins = Pins('LCD', ttlpins, self.bankspec,
                     suffix, offs, bank, mux,
-                    spec, origsuffix=suffix)
+                    spec, limit, origsuffix=suffix)
         self.pinmerge(pins)
 
     def rgmii(self, suffix, offs, bank, mux=1, spec=None):

diff --git a/src/spec/minitest.py b/src/spec/minitest.py
index 6f569e0406b24980734be0ec31311d40b06f690c..f0e104e4fbae67be855e1a07ea8bd6ac8ea0073e 100644 (file)
--- a/src/spec/minitest.py
+++ b/src/spec/minitest.py
@@ -21,19 +21,25 @@ def pinspec():
 
     # Bank B, 16-47
     pinouts.gpio("", ('B', 0), "B", 0, 28, 0)
-    pinouts.rgbttl("0", ('B', 0), "B", 1)
-    pinouts.spi("1", ('B', 12), "B", 2)
+    pinouts.rgbttl("", ('B', 0), "B", 1, limit=23)
+    pinouts.spi("1", ('B', 10), "B", 2)
     pinouts.quadspi("", ('B', 4), "B", 2)
     pinouts.uart("3", ('B', 16), "B", 2)
     pinouts.i2c("3", ('B', 18), "B", 2)
-    #pinouts.pwm("", ('B', 9), "B", 0, 1, mux=2)
-    pinouts.pwm("", ('B', 20), "B", 1, 2, mux=2)
-    pinouts.sdmmc("1", ('B', 22), "B", 2)
+    pinouts.pwm("", ('B', 21), "B", 0, 3, mux=2)
+    pinouts.sdmmc("1", ('B', 22), "B", 3)
     pinouts.eint("", ('B', 0), "B", 0, 4, mux=3)
-    pinouts.flexbus2("", ('B', 4), "B", 3)
+    pinouts.eint("", ('B', 20), "B", 4, 1, mux=2)
+    pinouts.eint("", ('B', 23), "B", 5, 1, mux=1)
+    pinouts.sdmmc("2", ('B', 4), "B", 3)
+    pinouts.jtag("2", ('B', 10), "B", 3)
+    pinouts.uartfull("0", ('B', 14), "B", 3)
+    pinouts.uartfull("1", ('B', 18), "B", 3)
+    pinouts.jtag("1", ('B', 24), "B", 2)
+    pinouts.spi("2", ('B', 24), "B", 1)
     pinouts.i2c("1", ('B', 0), "B", 2)
     pinouts.uart("2", ('B', 2), "B", 2)
-    pinouts.uart("4", ('B', 10), "B", 2)
+    pinouts.uart("4", ('B', 14), "B", 2)
 
 
     print ("""# Pinouts (PinMux)
@@ -111,15 +117,10 @@ auto-generated by [[pinouts.py]]
     # using "BM:Name".  Pins are removed in-order as listed from
     # lists (interfaces, EINTs, PWMs) from available pins.
 
-    # EOMA68 scenario.  not totally complete (some GPIO needed for PMIC)
-    # One interface to be connected to the MCU to give RTC and boot/dbg
-    # VBUS_EN, OTG_ID etc. are all not included below, there is plenty
-    # of spare GPIO.
-
-    eoma68 = ['B1:LCD/22', 'ULPI1/8', 'ULPI2', 'MMC', 'SD1', 'UART3',
+    minitest = ['B1:LCD/22', 'ULPI1/8', 'ULPI2', 'MMC', 'SD1', 'UART3',
               'TWI3', 'SPI2', 'E2:SD2', ]
-    eoma68_eint = ['EINT_0', 'EINT_1', 'EINT_2', 'EINT_3']
-    eoma68_pwm = ['D1:PWM_2']
+    minitest_eint = ['EINT_0', 'EINT_1', 'EINT_2', 'EINT_3']
+    minitest_pwm = ['D1:PWM_2']
     descriptions = {
         'MMC': 'internal (on Card)',
         'SD1': 'user-facing: internal (on Card), multiplexed with JTAG1\n'
@@ -134,8 +135,8 @@ auto-generated by [[pinouts.py]]
         'ULPI2': 'EOMA68-compliance: dual USB2 Host ULPI PHY'
     }
 
-    unused_pins = check_functions("EOMA68", bankspec, fns, pinouts,
-                                  eoma68, eoma68_eint, eoma68_pwm,
+    unused_pins = check_functions("MiniTest", bankspec, fns, pinouts,
+                                  minitest, minitest_eint, minitest_pwm,
                                   descriptions)