{
struct etna_context *ctx = etna_context(pctx);
+ if (ctx->dummy_rt)
+ etna_bo_del(ctx->dummy_rt);
+
if (ctx->primconvert)
util_primconvert_destroy(ctx->primconvert);
slab_create_child(&ctx->transfer_pool, &screen->transfer_pool);
list_inithead(&ctx->active_hw_queries);
+ /* create dummy RT buffer, used when rendering with no color buffer */
+ ctx->dummy_rt = etna_bo_new(ctx->screen->dev, 64 * 64 * 4,
+ DRM_ETNA_GEM_CACHE_WC);
+ if (!ctx->dummy_rt)
+ goto fail;
+
+ ctx->dummy_rt_reloc.bo = ctx->dummy_rt;
+ ctx->dummy_rt_reloc.offset = 0;
+ ctx->dummy_rt_reloc.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE;
+
return pctx;
fail:
/* list of active hardware queries */
struct list_head active_hw_queries;
+
+ struct etna_bo *dummy_rt;
+ struct etna_reloc dummy_rt_reloc;
};
static inline struct etna_context *
cs->TS_COLOR_STATUS_BASE.bo = NULL;
cs->TS_COLOR_SURFACE_BASE.bo = NULL;
- for (int i = 0; i < ETNA_MAX_PIXELPIPES; i++)
- cs->PE_PIPE_COLOR_ADDR[i].bo = NULL;
+ cs->PE_COLOR_ADDR = ctx->dummy_rt_reloc;
+ for (int i = 0; i < ctx->specs.pixel_pipes; i++)
+ cs->PE_PIPE_COLOR_ADDR[i] = ctx->dummy_rt_reloc;
}
if (sv->zsbuf != NULL) {