Required by radeonsi for optimal behavior.
contexts can return 0.
* ``PIPE_CAP_FENCE_SIGNAL``: True if the driver supports signaling semaphores
using fence_server_signal().
+* ``PIPE_CAP_CONSTBUF0_FLAGS``: The bits of pipe_resource::flags that must be
+ set when binding that buffer as constant buffer 0. If the buffer doesn't have
+ those bits set, pipe_context::set_constant_buffer(.., 0, ..) is ignored
+ by the driver, and the driver can throw assertion failures.
.. _pipe_capf:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
/* Stream output. */
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
case PIPE_CAP_MAX_VIEWPORTS:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
}
/* should only get here on unhandled cases */
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
case PIPE_CAP_VENDOR_ID:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
case PIPE_CAP_VENDOR_ID:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
case PIPE_CAP_VENDOR_ID:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
/* SWTCL-only features. */
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
case PIPE_CAP_DOUBLES:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
case PIPE_CAP_FENCE_SIGNAL:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
return 4;
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
}
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
case PIPE_CAP_VENDOR_ID:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
/* Stream output. */
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
/* Geometry shader output, unsupported. */
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
return 0;
case PIPE_CAP_VENDOR_ID:
return 0x1af4;
PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET,
PIPE_CAP_CONTEXT_PRIORITY_MASK,
PIPE_CAP_FENCE_SIGNAL,
+ PIPE_CAP_CONSTBUF0_FLAGS,
};
/**