add comments for SPR pipe_data

diff --git a/src/soc/fu/spr/pipe_data.py b/src/soc/fu/spr/pipe_data.py
index 717dff2ac2305c89be5d88451e80964f4f11fc43..6871aa98531d43ea26cc155fab601ce1ec770173 100644 (file)
--- a/src/soc/fu/spr/pipe_data.py
+++ b/src/soc/fu/spr/pipe_data.py
@@ -1,3 +1,14 @@
+"""SPR Pipeline Data structures
+
+Covers MFSPR and MTSPR.  however given that the SPRs are split across
+XER (which is 3 separate registers), Fast-SPR and Slow-SPR regfiles,
+the data structures are slightly more involved than just "INT, SPR".
+
+Links:
+* https://bugs.libre-soc.org/show_bug.cgi?id=348
+* https://libre-soc.org/openpower/isa/sprset/
+"""
+
 from nmigen import Signal, Const
 from ieee754.fpcommon.getop import FPPipeContext
 from soc.fu.pipe_data import IntegerData