better comments on rd/wr pending

diff --git a/src/soc/scoremulti/fu_reg_matrix.py b/src/soc/scoremulti/fu_reg_matrix.py
index 5c87676aa1c08298fbacdd2c8f102422aa829d5b..a4b66f5a85e183bf6638b40a613090aa1ed49c84 100644 (file)
--- a/src/soc/scoremulti/fu_reg_matrix.py
+++ b/src/soc/scoremulti/fu_reg_matrix.py
@@ -80,11 +80,15 @@ class FURegDepMatrix(Elaboratable):
         self.src_rsel_o = Array(rsel)  # src reg (bot)
 
         # for Function Unit "forward progress" (vertical), per-FU
-        self.wr_pend_o = Signal(n_fu_row, reset_less=True) # wr pending (right)
+
+        # global "merged" (all regs) src/dest pending vectors
         self.wr_dst_pend_o = Array(wpnd) # dest pending
-        self.rd_pend_o = Signal(n_fu_row, reset_less=True) # rd pending (right)
         self.rd_src_pend_o = Array(pend) # src1 pending
 
+        # per-port src/dest pending vectors
+        self.wr_pend_o = Signal(n_fu_row, reset_less=True) # wr pending (right)
+        self.rd_pend_o = Signal(n_fu_row, reset_less=True) # rd pending (right)
+
     def elaborate(self, platform):
         m = Module()
         return self._elaborate(m, platform)