-.PHONY: all corona prepare cocotb gitupdate
+.PHONY: all chip prepare cocotb gitupdate
all: prepare cocotb
(cd cocotb && ./run_ghdl.sh)
# builds just for fun (double-check) ghdl works
-corona:
+chip:
./vhd2obj.py
- (cd obj && ghdl -e -g --std=08 corona)
- (cd obj && ghdl -r -g --std=08 corona)
+ (cd obj && ghdl -e -g --std=08 chip)
+ (cd obj && ghdl -r -g --std=08 chip)
+# imports all ghdl "stuff" and outputs verilog
+chip_v: chip
+ (cd obj && yosys -m ghdl -p 'ghdl --std=08 chip' \
+ -p 'proc' -p 'write_verilog chip.v')