Move simulation HyperRAM pins off of DDR3 pins

diff --git a/src/ls2.py b/src/ls2.py
index 8cedbacf76754b7d17caca202c5dfa5e3a30159d..54251e3539800c9e69898aedcd9ddc99c80186f4 100644 (file)
--- a/src/ls2.py
+++ b/src/ls2.py
@@ -761,11 +761,10 @@ def build_platform(fpga, firmware):
     if platform is None:
         hyperram_pins = HyperRAMPads()
     elif fpga in ['isim']:
-        hyperram_ios = HyperRAMResource(0, cs_n="V12 V14 U12 U14",
-                                        dq="D4 D3 F4 F3 G2 H2 D2 E2",
-                                        rwds="U13", rst_n="T13", ck_p="V10",
-                                        # ck_n="V11" - for later (DDR)
-                                        attrs=Attrs(IOSTANDARD="LVCMOS33"))
+        hyperram_ios = HyperRAMResource(0, cs_n="B13",
+                                        dq="E14 C10 B10 E12 D12 A9 D11 D14",
+                                        rwds="C14", rst_n="E13", ck_p="D13",
+                                        attrs=Attrs(IO_TYPE="LVCMOS33"))
         platform.add_resources(hyperram_ios)
         hyperram_pins = platform.request("hyperram")
         print ("isim a7 hyperram", hyperram_ios)