PHYSICAL_SYNTHESIS = Coriolis
DESIGN_KIT = sxlib
- YOSYS_FLATTEN = Yes
+# YOSYS_FLATTEN = Yes
CHIP = chip
CORE = add
MARGIN = 2
# RM_CHIP = Yes
NETLISTS = $(shell cat nets.txt)
- PATTERNS = add_r
+# PATTERNS = add_r
include ./mk/design-flow.mk
blif: add.blif
vst: add.vst
-dreal: dreal-chip_cts_r
+
+lvx: lvx-chip_cts_r
+druc: druc-chip_cts_r
+dreal: dreal-chip_cts_r
flatph: flatph-chip_cts_r
+
layout: chip_cts_r.ap
gds: chip_cts_r.gds
+gds_flat: chip_cts_r_flat.gds
+cif: chip_cts_r.cif
+
-lvx: lvx-chip_cts_r
-druc: druc-chip_cts_r
view: cgt-chip_cts_r
sim: asimut-add_cts_r
+++ /dev/null
-#!/usr/bin/env python
-
-from helpers import l, u, n
-
-def pad_nums(s, sep="_"):
- res = []
- for i in range(4):
- res.append("%s%s%d" % (s, sep, i))
- return res
-
-a_pads = pad_nums("a")
-o_pads = pad_nums("f")
-
-chip = { 'pads.ioPadGauge' : 'pxlib'
- , 'pads.south' : a_pads[:2] + ["p_vddick_0", "p_vssick_0" ] + \
- a_pads[2:]
- , 'pads.east' : pad_nums("b")
- , 'pads.north' : o_pads[:2] + ["p_vddeck_0", "p_vsseck_0" ] + \
- o_pads[2:]
- , 'pads.west' : [ "p_clk_0",
- "rst",
- ]
- , 'core.size' : ( l(1000), l(1000) )
- , 'chip.size' : ( l(2500), l(2500) )
- , 'chip.clockTree' : True
- }
--- /dev/null
+#!/usr/bin/env python
+
+from helpers import l, u, n
+
+def pad_nums(s, sep="_"):
+ res = []
+ for i in range(4):
+ res.append("%s%s%d" % (s, sep, i))
+ return res
+
+a_pads = pad_nums("a")
+o_pads = pad_nums("f")
+
+chip = { 'pads.ioPadGauge' : 'pxlib'
+ , 'pads.south' : a_pads[:2] + ["p_vddick_0", "p_vssick_0" ] + \
+ a_pads[2:]
+ , 'pads.east' : pad_nums("b")
+ , 'pads.north' : o_pads[:2] + ["p_vddeck_0", "p_vsseck_0" ] + \
+ o_pads[2:]
+ , 'pads.west' : [ "p_clk_0",
+ "rst",
+ ]
+ , 'core.size' : ( l(1000), l(1000) )
+ , 'chip.size' : ( l(2500), l(2500) )
+ , 'chip.clockTree' : True
+ }
Cfg.getParamBool ( 'etesian.uniformDensity' ).setBool ( True )
Cfg.getParamInt ( 'anabatic.edgeLenght' ).setInt ( 24 )
Cfg.getParamInt ( 'anabatic.edgeWidth' ).setInt ( 8 )
-Cfg.getParamString ( 'anabatic.topRoutingLayer' ).setString ( 'METAL5')
+Cfg.getParamString ( 'anabatic.topRoutingLayer' ).setString ( 'METAL4')
Cfg.getParamInt ( 'katana.eventsLimit' ).setInt ( 1000000 )
Cfg.getParamInt ( 'katana.hTracksReservedLocal' ).setInt ( 7 )
Cfg.getParamInt ( 'katana.vTracksReservedLocal' ).setInt ( 6 )
env.setPOWER( 'vdd' )
env.setGROUND( 'vss' )
+Cfg.Configuration.popDefaultPriority()
print 'Successfully read user configuration'