bit more experimenting making an ioring around an adder
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 24 Feb 2020 19:09:40 +0000 (19:09 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 24 Feb 2020 19:09:40 +0000 (19:09 +0000)
experiments4/Makefile
experiments4/coriolis2/ioring.py [deleted file]
experiments4/coriolis2/ioring.py.testing [new file with mode: 0644]
experiments4/coriolis2/settings.py

index d0591928cc90a6dba13bafc5f890421ee30de773..f85652dfb95c444cb27fb36b7b2a02b464bcb388 100755 (executable)
@@ -4,7 +4,7 @@
        PHYSICAL_SYNTHESIS = Coriolis
                DESIGN_KIT = sxlib
 
-           YOSYS_FLATTEN = Yes
+#           YOSYS_FLATTEN = Yes
                      CHIP = chip
                      CORE = add
                    MARGIN = 2
@@ -18,7 +18,7 @@
 #                 RM_CHIP = Yes
 
                  NETLISTS = $(shell cat nets.txt)
-                 PATTERNS = add_r
+#                PATTERNS = add_r
 
 
  include ./mk/design-flow.mk
 
 blif:      add.blif
 vst:       add.vst
-dreal:      dreal-chip_cts_r
+
+lvx:       lvx-chip_cts_r
+druc:      druc-chip_cts_r
+dreal:     dreal-chip_cts_r
 flatph:     flatph-chip_cts_r
+
 layout:    chip_cts_r.ap
 gds:       chip_cts_r.gds
+gds_flat:  chip_cts_r_flat.gds
+cif:      chip_cts_r.cif
+
 
-lvx:       lvx-chip_cts_r
-druc:      druc-chip_cts_r
 view:      cgt-chip_cts_r
 sim:       asimut-add_cts_r
diff --git a/experiments4/coriolis2/ioring.py b/experiments4/coriolis2/ioring.py
deleted file mode 100644 (file)
index cc8a055..0000000
+++ /dev/null
@@ -1,26 +0,0 @@
-#!/usr/bin/env python
-
-from helpers import l, u, n
-
-def pad_nums(s, sep="_"):
-    res = []
-    for i in range(4):
-        res.append("%s%s%d" % (s, sep, i))
-    return res
-
-a_pads = pad_nums("a")
-o_pads = pad_nums("f")
-
-chip = { 'pads.ioPadGauge' : 'pxlib'
-        , 'pads.south'      :  a_pads[:2] + ["p_vddick_0", "p_vssick_0" ] + \
-                               a_pads[2:]
-       , 'pads.east'       : pad_nums("b")
-       , 'pads.north'      : o_pads[:2] + ["p_vddeck_0", "p_vsseck_0" ] + \
-                             o_pads[2:]
-       , 'pads.west'       : [ "p_clk_0",
-                               "rst", 
-                             ]
-       , 'core.size'       : ( l(1000), l(1000) )
-       , 'chip.size'       : ( l(2500), l(2500) )
-       , 'chip.clockTree'  : True
-       }
diff --git a/experiments4/coriolis2/ioring.py.testing b/experiments4/coriolis2/ioring.py.testing
new file mode 100644 (file)
index 0000000..cc8a055
--- /dev/null
@@ -0,0 +1,26 @@
+#!/usr/bin/env python
+
+from helpers import l, u, n
+
+def pad_nums(s, sep="_"):
+    res = []
+    for i in range(4):
+        res.append("%s%s%d" % (s, sep, i))
+    return res
+
+a_pads = pad_nums("a")
+o_pads = pad_nums("f")
+
+chip = { 'pads.ioPadGauge' : 'pxlib'
+        , 'pads.south'      :  a_pads[:2] + ["p_vddick_0", "p_vssick_0" ] + \
+                               a_pads[2:]
+       , 'pads.east'       : pad_nums("b")
+       , 'pads.north'      : o_pads[:2] + ["p_vddeck_0", "p_vsseck_0" ] + \
+                             o_pads[2:]
+       , 'pads.west'       : [ "p_clk_0",
+                               "rst", 
+                             ]
+       , 'core.size'       : ( l(1000), l(1000) )
+       , 'chip.size'       : ( l(2500), l(2500) )
+       , 'chip.clockTree'  : True
+       }
index bd86c23b724143870a1365d25b193c7a9d17f0d0..f93e33d99202736654357e8bca453cc61e7bb1bd 100644 (file)
@@ -29,7 +29,7 @@ Cfg.getParamPercentage( 'etesian.aspectRatio'         ).setPercentage( 100.0   )
 Cfg.getParamBool      ( 'etesian.uniformDensity'      ).setBool      ( True    )
 Cfg.getParamInt       ( 'anabatic.edgeLenght'         ).setInt       ( 24      )
 Cfg.getParamInt       ( 'anabatic.edgeWidth'          ).setInt       ( 8       )
-Cfg.getParamString    ( 'anabatic.topRoutingLayer'    ).setString    ( 'METAL5')
+Cfg.getParamString    ( 'anabatic.topRoutingLayer'    ).setString    ( 'METAL4')
 Cfg.getParamInt       ( 'katana.eventsLimit'          ).setInt       ( 1000000 )
 Cfg.getParamInt       ( 'katana.hTracksReservedLocal' ).setInt       ( 7       )
 Cfg.getParamInt       ( 'katana.vTracksReservedLocal' ).setInt       ( 6       )
@@ -52,6 +52,7 @@ env.setCLOCK( 'clk' )
 env.setPOWER( 'vdd' )
 env.setGROUND( 'vss' )
 
+Cfg.Configuration.popDefaultPriority()
 
 print 'Successfully read user configuration'