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weird: adding TestMemory with no port causes nmigen recursion-exceeded
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Tue, 16 Jun 2020 13:00:12 +0000
(14:00 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Tue, 16 Jun 2020 13:00:12 +0000
(14:00 +0100)
src/soc/simple/core.py
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diff --git
a/src/soc/simple/core.py
b/src/soc/simple/core.py
index c013ed2a88c6a288b8f21b0fa78cfb2d3ad64017..aea3ea9960d8e34ff3f52101f6db9c656dde6515 100644
(file)
--- a/
src/soc/simple/core.py
+++ b/
src/soc/simple/core.py
@@
-58,7
+58,7
@@
class NonProductionCore(Elaboratable):
pi = self.l0.l0.dports[0].pi
# Test Instruction memory
- self.imem = TestMemory(32, idepth)
+
#
self.imem = TestMemory(32, idepth)
# function units (only one each)
self.fus = AllFunctionUnits(pilist=[pi], addrwid=addrwid)
@@
-85,7
+85,7
@@
class NonProductionCore(Elaboratable):
m.submodules.pdecode2 = dec2 = self.pdecode2
m.submodules.fus = self.fus
m.submodules.l0 = l0 = self.l0
- m.submodules.imem = imem = self.imem
+
#
m.submodules.imem = imem = self.imem
self.regs.elaborate_into(m, platform)
regs = self.regs
fus = self.fus.fus