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add clock output on hyperram sim
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sat, 26 Mar 2022 22:40:47 +0000
(22:40 +0000)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sat, 26 Mar 2022 22:40:47 +0000
(22:40 +0000)
src/simsoc_hyperram_tb.v
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diff --git
a/src/simsoc_hyperram_tb.v
b/src/simsoc_hyperram_tb.v
index fcb2c25ab0bc3bdc1fdb5f94267d3897dece7588..5ae219d6d9c5a0f94d1830810c44ebbf271391d1 100644
(file)
--- a/
src/simsoc_hyperram_tb.v
+++ b/
src/simsoc_hyperram_tb.v
@@
-113,6
+113,7
@@
s27kl0641
$dumpvars(0, clkin);
$dumpvars(0, o_resetn);
$dumpvars(0, o_csn0);
+ $dumpvars(0, o_clk);
$dumpvars(0, io_rwds);
$dumpvars(0, io_dq);
$dumpvars(0, uart_tx);