add clock output on hyperram sim
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 26 Mar 2022 22:40:47 +0000 (22:40 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 26 Mar 2022 22:40:47 +0000 (22:40 +0000)
src/simsoc_hyperram_tb.v

index fcb2c25ab0bc3bdc1fdb5f94267d3897dece7588..5ae219d6d9c5a0f94d1830810c44ebbf271391d1 100644 (file)
@@ -113,6 +113,7 @@ s27kl0641
       $dumpvars(0, clkin);
       $dumpvars(0, o_resetn);
       $dumpvars(0, o_csn0);
+      $dumpvars(0, o_clk);
       $dumpvars(0, io_rwds);
       $dumpvars(0, io_dq);
       $dumpvars(0, uart_tx);