add special pagetable to ifetch_invalid with execute perms barred

diff --git a/src/soc/experiment/test/test_loadstore1.py b/src/soc/experiment/test/test_loadstore1.py
index 8074e17fc070f48ff93833fe49a7c9806247829b..4e7ee7fe885ea0047dc1404ce668ff058150c94a 100644 (file)
--- a/src/soc/experiment/test/test_loadstore1.py
+++ b/src/soc/experiment/test/test_loadstore1.py
@@ -546,7 +546,9 @@ def test_loadstore1_invalid():
 def test_loadstore1_ifetch_invalid():
     m, cmpi = setup_mmu()
 
-    mem = {}
+    # this is a specially-arranged page table which has the permissions
+    # barred for execute on the leaf node (EAA=0x2 instead of EAA=0x3)
+    mem = pagetables.test2
 
     # nmigen Simulation
     sim = Simulator(m)