nope - need it to be zero if not identified as svp64

diff --git a/src/soc/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py
index a5fab3da3e5b71d0f9e5df3a06d152fbb090a514..2f6c0bdec572db0ab605e83087ec7b72758e704c 100644 (file)
--- a/src/soc/decoder/power_decoder2.py
+++ b/src/soc/decoder/power_decoder2.py
@@ -1307,7 +1307,8 @@ class SVP64PowerDecoder(Elaboratable):
         l = []
         for idx in rmfields:
             l.append(self.opcode_in[32-idx])
-        comb += self.svp64_rm.eq(Cat(*l))
+        with m.If(self.is_svp64_mode):
+            comb += self.svp64_rm.eq(Cat(*l))
 
         return m