r200: use preprocessor for big vs little endian checks

Instead of using a function at runtime we can just build the right code
for the right platform.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>

diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c
index 1108b91c22bd973701142446a4020e4027030e0b..6b5988bdb67eff7b12f7bdcd7c61ccd921d43cbc 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_blit.c
+++ b/src/mesa/drivers/dri/r200/r200_blit.c
@@ -42,41 +42,29 @@ static inline uint32_t cmdpacket0(struct radeon_screen *rscrn,
 unsigned r200_check_blit(mesa_format mesa_format, uint32_t dst_pitch)
 {
     /* XXX others? */
-    if (_mesa_little_endian()) {
-       switch (mesa_format) {
-       case MESA_FORMAT_B8G8R8A8_UNORM:
-       case MESA_FORMAT_B8G8R8X8_UNORM:
-       case MESA_FORMAT_B5G6R5_UNORM:
-       case MESA_FORMAT_B4G4R4A4_UNORM:
-       case MESA_FORMAT_B5G5R5A1_UNORM:
-       case MESA_FORMAT_A_UNORM8:
-       case MESA_FORMAT_L_UNORM8:
-       case MESA_FORMAT_I_UNORM8:
-       /* swizzled - probably can't happen with the disabled Choose8888TexFormat code */
-       case MESA_FORMAT_A8B8G8R8_UNORM:
-       case MESA_FORMAT_R8G8B8A8_UNORM:
-           break;
-       default:
-           return 0;
-       }
-    }
-    else {
-       switch (mesa_format) {
-       case MESA_FORMAT_A8R8G8B8_UNORM:
-       case MESA_FORMAT_X8R8G8B8_UNORM:
-       case MESA_FORMAT_R5G6B5_UNORM:
-       case MESA_FORMAT_A4R4G4B4_UNORM:
-       case MESA_FORMAT_A1R5G5B5_UNORM:
-       case MESA_FORMAT_A_UNORM8:
-       case MESA_FORMAT_L_UNORM8:
-       case MESA_FORMAT_I_UNORM8:
-       /* swizzled  - probably can't happen with the disabled Choose8888TexFormat code */
-       case MESA_FORMAT_R8G8B8A8_UNORM:
-       case MESA_FORMAT_A8B8G8R8_UNORM:
-          break;
-       default:
-          return 0;
-       }
+    switch (mesa_format) {
+#ifdef PIPE_ARCH_LITTLE_ENDIAN
+    case MESA_FORMAT_B8G8R8A8_UNORM:
+    case MESA_FORMAT_B8G8R8X8_UNORM:
+    case MESA_FORMAT_B5G6R5_UNORM:
+    case MESA_FORMAT_B4G4R4A4_UNORM:
+    case MESA_FORMAT_B5G5R5A1_UNORM:
+#else
+    case MESA_FORMAT_A8R8G8B8_UNORM:
+    case MESA_FORMAT_X8R8G8B8_UNORM:
+    case MESA_FORMAT_R5G6B5_UNORM:
+    case MESA_FORMAT_A4R4G4B4_UNORM:
+    case MESA_FORMAT_A1R5G5B5_UNORM:
+#endif
+    case MESA_FORMAT_A_UNORM8:
+    case MESA_FORMAT_L_UNORM8:
+    case MESA_FORMAT_I_UNORM8:
+    /* swizzled - probably can't happen with the disabled Choose8888TexFormat code */
+    case MESA_FORMAT_A8B8G8R8_UNORM:
+    case MESA_FORMAT_R8G8B8A8_UNORM:
+        break;
+    default:
+        return 0;
     }
 
     /* Rendering to small buffer doesn't work.
@@ -133,12 +121,11 @@ static void inline emit_tx_setup(struct r200_context *r200,
     assert(height <= 2048);
     assert(offset % 32 == 0);
 
-    if (_mesa_little_endian()) {
-       txformat |= tx_table_le[src_mesa_format].format;
-    }
-    else {
-       txformat |= tx_table_be[src_mesa_format].format;
-    }
+#ifdef PIPE_ARCH_LITTLE_ENDIAN
+    txformat |= tx_table_le[src_mesa_format].format;
+#else
+    txformat |= tx_table_be[src_mesa_format].format;
+#endif
 
     if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE)
        offset |= R200_TXO_MACRO_TILE;
@@ -183,8 +170,11 @@ static void inline emit_tx_setup(struct r200_context *r200,
            break;
     case MESA_FORMAT_A8B8G8R8_UNORM:
     case MESA_FORMAT_R8G8B8A8_UNORM:
-       if ((dst_mesa_format == MESA_FORMAT_A8B8G8R8_UNORM && _mesa_little_endian()) ||
-          (dst_mesa_format == MESA_FORMAT_R8G8B8A8_UNORM && !_mesa_little_endian())) {
+#ifdef PIPE_ARCH_LITTLE_ENDIAN
+       if (dst_mesa_format == MESA_FORMAT_A8B8G8R8_UNORM) {
+#else
+       if (dst_mesa_format == MESA_FORMAT_R8G8B8A8_UNORM) {
+#endif
            BEGIN_BATCH(10);
            OUT_BATCH_REGVAL(RADEON_PP_CNTL, (RADEON_TEX_0_ENABLE |
                                              RADEON_TEX_BLEND_0_ENABLE));

diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c
index 8826a9bd7e798baf2f62b6444b52c659be500671..df36ca68980a1b25175db19abf7078147f5b0ddf 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_texstate.c
+++ b/src/mesa/drivers/dri/r200/r200_texstate.c
@@ -1308,8 +1308,11 @@ static void setup_hardware_state(r200ContextPtr rmesa, radeonTexObj *t)
 
    if (!t->image_override) {
       if (VALID_FORMAT(firstImage->TexFormat)) {
-        const struct tx_table *table = _mesa_little_endian() ? tx_table_le :
-           tx_table_be;
+#ifdef PIPE_ARCH_LITTLE_ENDIAN
+        const struct tx_table *table = tx_table_le;
+#else
+        const struct tx_table *table = tx_table_be;
+#endif
         
         t->pp_txformat &= ~(R200_TXFORMAT_FORMAT_MASK |
                             R200_TXFORMAT_ALPHA_IN_MAP);