# create some instructions (some random, some regression tests)
instrs = []
- if True:
- for i in range(5):
+ if False:
+ for i in range(10):
src1 = randint(1, dut.n_regs-1)
src2 = randint(1, dut.n_regs-1)
while True:
dest = randint(1, dut.n_regs-1)
+ break
if dest not in [src1, src2]:
break
#src1 = 2
instrs.append( (3, 6, 7, 2) )
instrs.append( (4, 4, 7, 1) )
+ if False:
+ # self-read/write-after-write followed by Read-after-Write
+ instrs.append((1, 1, 1, 1))
+ instrs.append((1, 5, 3, 0))
+
+ if False:
+ # Read-after-Write followed by self-read-after-write
+ instrs.append((5, 6, 1, 2))
+ instrs.append((1, 1, 1, 1))
+
+ if False:
+ # self-read-write sandwich
+ instrs.append((5, 6, 1, 2))
+ instrs.append((1, 1, 1, 1))
+ instrs.append((1, 5, 3, 0))
+
+ if True:
+ instrs.append( (7, 1, 2, 0) )
+ instrs.append( (1, 1, 4, 2) )
+ instrs.append( (2, 3, 2, 2) )
+ instrs.append( (5, 3, 1, 0) )
+ instrs.append( (7, 3, 5, 2) )
+ instrs.append( (1, 2, 6, 2) )
+ instrs.append( (5, 2, 5, 2) )
+ instrs.append( (2, 2, 3, 0) )
+ instrs.append( (4, 2, 2, 1) )
+ instrs.append( (2, 4, 6, 1) )
+
# issue instruction(s), wait for issue to be free before proceeding
for i, (src1, src2, dest, op) in enumerate(instrs):
(self.dest_i & self.src2_i))
# connect up hazard checks: read-after-write and write-after-read
+ m.d.comb += dest_c.hazard_i.eq(self.rd_pend_i) # read-after-write
with m.If(~selfhazard):
- m.d.comb += dest_c.hazard_i.eq(self.rd_pend_i) # read-after-write
- m.d.comb += src1_c.hazard_i.eq(self.wr_pend_i) # write-after-read
- m.d.comb += src2_c.hazard_i.eq(self.wr_pend_i) # write-after-read
+ m.d.comb += src1_c.hazard_i.eq(self.wr_pend_i) # write-after-read
+ m.d.comb += src2_c.hazard_i.eq(self.wr_pend_i) # write-after-read
# connect fwd / reg-sel outputs
for c, fwd, rsel in [(dest_c, self.dest_fwd_o, self.dest_rsel_o),
# to be accumulated to indicate if register is in use (globally)
# after ORing, is fed back in to rd_pend_i / wr_pend_i
m.d.comb += self.rd_rsel_o.eq(src1_c.q_o | src2_c.q_o)
- with m.If(~selfhazard):
- m.d.comb += self.wr_rsel_o.eq(dest_c.q_o)
+ #with m.If(~selfhazard):
+ m.d.comb += self.wr_rsel_o.eq(dest_c.q_o)
return m