remove i_specfn and o_specfn from FP*MuxInOut, use self.alu.ispec() and ospec()
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 1 Aug 2019 01:23:10 +0000 (02:23 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 1 Aug 2019 01:23:10 +0000 (02:23 +0100)
every class has an alu object, the pipe specs are the same for all use-cases
so....

src/ieee754/fclass/pipeline.py
src/ieee754/fcvt/pipeline.py
src/ieee754/fpadd/pipeline.py
src/ieee754/fpdiv/pipeline.py
src/ieee754/fpmul/pipeline.py
src/ieee754/fpmul/specialcases.py
src/nmutil/concurrentunit.py
src/nmutil/stageapi.py

index dbb4460aa1c8de789fe06e2636d77918e0c302c9..204ef32e6003588fed3238fbe24afb894196f514 100644 (file)
@@ -67,12 +67,6 @@ class FPClassMuxInOutBase(ReservationStations):
         self.alu = pkls(self.in_pspec, self.out_pspec, modkls)
         ReservationStations.__init__(self, num_rows)
 
-    def i_specfn(self):
-        return FPBaseData(self.in_pspec)
-
-    def o_specfn(self):
-        return FPPackData(self.out_pspec)
-
 
 class FPClassMuxInOut(FPClassMuxInOutBase):
     """ Reservation-Station version of FPClass pipeline.
index 2eb83c5aece89851c705cfd0dfb13a6daf54e4d1..a7b01f707c47578f4efe8c08ed94fd83160bf11c 100644 (file)
@@ -89,7 +89,7 @@ class FPCVTMuxInOutBase(ReservationStations):
     """ Reservation-Station version of FPCVT pipeline.
 
         * fan-in on inputs (an array of FPBaseData: a,b,mid)
-        * 2-stage multiplier pipeline
+        * converter pipeline (alu)
         * fan-out on outputs (an array of FPPackData: z,mid)
 
         Fan-in and Fan-out are combinatorial.
@@ -106,12 +106,6 @@ class FPCVTMuxInOutBase(ReservationStations):
         self.alu = pkls(modkls, e_extra, self.in_pspec, self.out_pspec)
         ReservationStations.__init__(self, num_rows)
 
-    def i_specfn(self):
-        return FPBaseData(self.in_pspec)
-
-    def o_specfn(self):
-        return FPPackData(self.out_pspec)
-
 
 class FPCVTF2IntMuxInOut(FPCVTMuxInOutBase):
     """ Reservation-Station version of FPCVT pipeline.
index bbeff3d161c801192db6244c2b7fd9d480e045dc..432474179b4db22ac1874624f091a81341d3c610 100644 (file)
@@ -89,9 +89,3 @@ class FPADDMuxInOut(ReservationStations):
         self.pspec = PipelineSpec(width, self.id_wid, op_wid)
         self.alu = FPADDBasePipe(self.pspec)
         ReservationStations.__init__(self, num_rows)
-
-    def i_specfn(self):
-        return FPBaseData(self.pspec)
-
-    def o_specfn(self):
-        return FPPackData(self.pspec)
index 3bbf3123ca6888b7033412a685b6245459beb493..939447acf0fe58af194885225f68833ddb77c9de 100644 (file)
@@ -188,9 +188,3 @@ class FPDIVMuxInOut(ReservationStations):
         # self.alu = FPDIVBasePipe(new_pspec)
         self.alu = FPDIVBasePipe(self.pspec)
         ReservationStations.__init__(self, num_rows)
-
-    def i_specfn(self):
-        return FPBaseData(self.pspec)
-
-    def o_specfn(self):
-        return FPPackData(self.pspec)
index dae5fbb4f3dcf779aa991d9d4fb50c9a4282957e..82b881ca8bc03209674e537343ea23dc1fe50b98 100644 (file)
@@ -1,4 +1,7 @@
-"""IEEE Floating Point Multiplier Pipeline
+"""IEEE754 Floating Point Multiplier Pipeline
+
+Copyright (C) 2019 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
+Copyright (C) 2019 Jake Lifshay
 
 Relevant bugreport: http://bugs.libre-riscv.org/show_bug.cgi?id=77
 
@@ -86,9 +89,3 @@ class FPMULMuxInOut(ReservationStations):
         self.pspec = PipelineSpec(width, self.id_wid, self.op_wid)
         self.alu = FPMULBasePipe(self.pspec)
         ReservationStations.__init__(self, num_rows)
-
-    def i_specfn(self):
-        return FPBaseData(self.pspec)
-
-    def o_specfn(self):
-        return FPPackData(self.pspec)
index efab2e32b6a58b77fa6a0048f49b85fe44f34ef7..4fc3e3cf07a63f9dd1773a8d241035b61c1add60 100644 (file)
@@ -1,4 +1,9 @@
-# IEEE Floating Point Multiplier 
+"""IEEE754 Floating Point Multiplier
+
+Copyright (C) 2019 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
+Copyright (C) 2019 Jake Lifshay
+
+"""
 
 from nmigen import Module, Signal, Cat, Const
 from nmigen.cli import main, verilog
index 3d426ff9a7fe67f8969a9454ddf9cda365c61d97..a04f5769c3ffc9cdd03df9e2af84a9dd3ef0896b 100644 (file)
@@ -4,7 +4,7 @@
     * data goes through a pipeline
     * results fan back out.
 
-    the output data format has to have a member "mid", which is used
+    the output data format has to have a member "muxid", which is used
     as the array index on fan-out
 """
 
@@ -40,7 +40,8 @@ class ReservationStations(Elaboratable):
 
         Input: num_rows - number of input and output Reservation Stations
 
-        Requires: the addition of an "alu" object, an i_specfn and an o_specfn
+        Requires: the addition of an "alu" object, from which ispec and ospec
+        are taken, and inpipe and outpipe are connected to it
 
         * fan-in on inputs (an array of FPADDBaseData: a,b,mid)
         * ALU pipeline
@@ -71,4 +72,8 @@ class ReservationStations(Elaboratable):
     def ports(self):
         return self._ports
 
+    def i_specfn(self):
+        return self.alu.ispec()
 
+    def o_specfn(self):
+        return self.alu.ospec()
index 6ed34f5e631de239d6e33c803340e64dfd72f3ae..5c0308e23afb1fae4dd9eea048a0276bf250c3da 100644 (file)
@@ -158,11 +158,11 @@ class StageHelper(Stage):
         if stage is not None:
             self.set_specs(self, self)
 
-    def ospec(self, name):
+    def ospec(self, name=None):
         assert self._ospecfn is not None
         return _spec(self._ospecfn, name)
 
-    def ispec(self, name):
+    def ispec(self, name=None):
         assert self._ispecfn is not None
         return _spec(self._ispecfn, name)