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radeonsi: don't ignore PIPE_FLUSH_ASYNC
authorMarek Olšák <marek.olsak@amd.com>
Thu, 25 Apr 2019 23:42:25 +0000 (19:42 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Fri, 26 Apr 2019 19:44:39 +0000 (15:44 -0400)
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/drivers/radeonsi/si_fence.c patch | blob | history

diff --git a/src/gallium/drivers/radeonsi/si_fence.c b/src/gallium/drivers/radeonsi/si_fence.c
index 3d23597413c6f17683f0dbb417e71b6414fb3752..ffda98d2834f1ea42c9d2c6b43d56d67049b3684 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_fence.c
+++ b/src/gallium/drivers/radeonsi/si_fence.c
@@ -573,7 +573,7 @@ static void si_flush_from_st(struct pipe_context *ctx,
        }
        assert(!fine.buf);
 finish:
-       if (!(flags & PIPE_FLUSH_DEFERRED)) {
+       if (!(flags & (PIPE_FLUSH_DEFERRED | PIPE_FLUSH_ASYNC))) {
                if (sctx->dma_cs)
                        ws->cs_sync_flush(sctx->dma_cs);
                ws->cs_sync_flush(sctx->gfx_cs);