/* Uniforms are begin at (REGISTER_UNIFORMS - uniform_count) */
#define REGISTER_UNIFORMS 24
+/* r24 and r25 are special registers that only exist during the pipeline,
+ * by using them when we don't care about the register we skip a roundtrip
+ * to the register file. */
#define REGISTER_UNUSED 24
#define REGISTER_CONSTANT 26
#define REGISTER_LDST_BASE 26
/* Check if this instruction has registers */
if (ins->compact_branch) continue;
+ unsigned src2_reg = REGISTER_UNUSED;
+ if (ins->has_inline_constant)
+ src2_reg = ins->inline_constant >> 11;
+ else if (ins->src[1] != ~0)
+ src2_reg = SSA_REG_FROM_FIXED(ins->src[1]);
+
/* Otherwise, just emit the registers */
uint16_t reg_word = 0;
midgard_reg_info registers = {
.src1_reg = (ins->src[0] == ~0 ?
REGISTER_UNUSED :
SSA_REG_FROM_FIXED(ins->src[0])),
- .src2_reg = (ins->src[1] == ~0 ?
- ins->inline_constant >> 11 :
- SSA_REG_FROM_FIXED(ins->src[1])),
+ .src2_reg = src2_reg,
.src2_imm = ins->has_inline_constant,
.out_reg = (ins->dest == ~0 ?
REGISTER_UNUSED :