code-format tidyup, move plic rules to where they are not #ifdefd out

diff --git a/src/bsv/bsv_lib/slow_peripherals_template.bsv b/src/bsv/bsv_lib/slow_peripherals_template.bsv
index 489c218b471adf26a51a884860669f387f48dd7a..2ea5426fd9e572302d57f98ffde94e9cc6bf175e 100644 (file)
--- a/src/bsv/bsv_lib/slow_peripherals_template.bsv
+++ b/src/bsv/bsv_lib/slow_peripherals_template.bsv
@@ -133,25 +133,30 @@ package slow_peripherals;
     /*========== pinmux connections ============*/
 {7}
 {8}
+
+    /*=================== PLIC Connections ==================== */
+{10}
+
     rule rl_completion_msg_from_plic;
-                 let id <- plic.intrpt_completion;
+         let id <- plic.intrpt_completion;
       interrupt_id <= id;
-      `ifdef verbose $display("Dequeing the FIFO -- PLIC Interrupt Serviced id: %d",id); `endif
-               endrule
+      `ifdef verbose
+        $display("Dequeing the FIFO -- PLIC Interrupt Serviced id: %d",id);
+       `endif
+       endrule
 
     for(Integer i=0; i <`INTERRUPT_PINS; i=i+1) begin
            rule deq_gateway_queue;
                    if(interrupt_id==fromInteger(i)) begin
                            ff_gateway_queue[i].deq;
-          `ifdef $display($time,"Dequeing the Interrupt request for ID: %d",i); `endif
+          `ifdef verbose
+            $display($time,"Dequeing the Interrupt request for ID: %d",i);
+          `endif
         end
       endrule
     end
-    // NEEL EDIT OVER
-               /*=======================================================*/
-               /*=================== PLIC Connections ==================== */
                `ifdef PLIC_main
-                       /*TODO DMA interrupt need to be connected to the plic
+                       /*TODO DMA interrupt need to be connected to the plic */
                        for(Integer i=1; i<8; i=i+1) begin
          `ifdef DMA
              rule rl_connect_dma_interrupts_to_plic;
@@ -166,53 +171,6 @@ package slow_peripherals;
              endrule
           `endif
          end
-                       */
-{10}
-                       `ifdef UART0 
-                               SyncBitIfc#(Bit#(1)) uart0_interrupt <-
-                                  mkSyncBitToCC(sp_clock, uart_reset); 
-                               rule synchronize_the_uart0_interrupt;
-                                       uart0_interrupt.send(uart0.irq);                
-                               endrule
-                       `endif
-                       rule rl_connect_uart_to_plic;
-                               `ifdef UART0
-                                       if(uart0_interrupt.read==1'b1) begin
-                                               ff_gateway_queue[27].enq(1);
-                                               plic.ifc_external_irq[27].irq_frm_gateway(True);
-               end
-                               
-            `else
-                                       ff_gateway_queue[27].enq(0);
-            `endif
-         endrule
-             
-                       for(Integer i = 28; i<`INTERRUPT_PINS; i=i+1) begin
-                               rule rl_raise_interrupts;
-                                       if((i-28)<`IONum) begin //Peripheral interrupts
-                                               if(gpio.to_plic[i-28]==1'b1) begin
-                                                       plic.ifc_external_irq[i].irq_frm_gateway(True);
-                                                               ff_gateway_queue[i].enq(1);     
-                  end
-                                       end
-                               endrule
-                       end
-                       
-         rule rl_completion_msg_from_plic;
-                               let id <- plic.intrpt_completion;
-            interrupt_id <= id;
-            `ifdef verbose $display("Dequeing the FIFO -- PLIC Interrupt Serviced id: %d",id); `endif
-                       endrule
-
-         for(Integer i=0; i <`INTERRUPT_PINS; i=i+1) begin
-                               rule deq_gateway_queue;
-                                       if(interrupt_id==fromInteger(i)) begin
-                                               ff_gateway_queue[i].deq;
-                  `ifdef $display($time,"Dequeing the Interrupt request for ID: %d",i); `endif
-               end
-            endrule
-         end
-
                                
                `endif
                        /*======================================================= */

diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py
index b75caa9e36fd9e2e82b1952f349c2f83c7c7dd75..1737ba3662d0d5f0579e8b79f7aad479cb76e0c4 100644 (file)
--- a/src/bsv/peripheral_gen.py
+++ b/src/bsv/peripheral_gen.py
@@ -168,7 +168,7 @@ class PBase(object):
         if niq == 0:
             return ('', irq_offs)
         name = "{0}{1}".format(self.name, self.mksuffix(self.name, inum))
-        res.append("        // PLIC rules for {0}".format(name))
+        res.append("    // PLIC rules for {0}".format(name))
         for idx in range(niq):
             plic_obj = self.plic_object(name, idx)
             print "plic_obj", name, idx, plic_obj
@@ -178,12 +178,12 @@ class PBase(object):
         return ('\n'.join(res), irq_offs)
 
 mkplic_rule = """\
-         rule rl_connect_{0}_to_plic_{2};
-            if({1} == 1'b1) begin
-                ff_gateway_queue[{2}].enq(1);
-                plic.ifc_external_irq[{2}].irq_frm_gateway(True);
-            end
-         endrule
+     rule rl_connect_{0}_to_plic_{2};
+        if({1} == 1'b1) begin
+            ff_gateway_queue[{2}].enq(1);
+            plic.ifc_external_irq[{2}].irq_frm_gateway(True);
+        end
+     endrule
 """
 
 class uart(PBase):
@@ -272,12 +272,12 @@ class quart(PBase):
         return ('\n'.join(ret), irq_offs)
 
 uart_plic_template = """\
-         // PLIC {0} synchronisation with irq {1}
-         SyncBitIfc#(Bit#(1)) {0}_interrupt <-
-                              mkSyncBitToCC(sp_clock, uart_reset);
-         rule plic_synchronize_{0}_interrupt_{1};
-             {0}_interrupt.send({0}.irq);
-         endrule
+     // PLIC {0} synchronisation with irq {1}
+     SyncBitIfc#(Bit#(1)) {0}_interrupt <-
+                                mkSyncBitToCC(sp_clock, uart_reset);
+     rule plic_synchronize_{0}_interrupt_{1};
+         {0}_interrupt.send({0}.irq);
+     endrule
 """
 
 class rs232(PBase):