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author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Fri, 26 Jun 2020 17:58:38 +0000
(18:58 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Fri, 26 Jun 2020 17:58:38 +0000
(18:58 +0100)
src/soc/experiment/lsmem.py
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diff --git
a/src/soc/experiment/lsmem.py
b/src/soc/experiment/lsmem.py
index e926017646bca872e940e584b37337c766f991f8..d829292051aeb5cbe69be01450ff9c0a37c97cb6 100644
(file)
--- a/
src/soc/experiment/lsmem.py
+++ b/
src/soc/experiment/lsmem.py
@@
-20,8
+20,8
@@
class TestMemLoadStoreUnit(LoadStoreUnitInterface, Elaboratable):
# limit TestMemory to 2^6 entries of regwid size
m.submodules.mem = mem = TestMemory(regwid, 6, granularity=8)
- do_load = Signal() # set when
doing a
load while valid and not stalled
- do_store = Signal() # set when
doing a
store while valid and not stalled
+ do_load = Signal() # set when load while valid and not stalled
+ do_store = Signal() # set when store while valid and not stalled
m.d.comb += [
do_load.eq(self.x_ld_i & (self.x_valid_i & ~self.x_stall_i)),