annoying, coldboot.bin getting too big to fit into 0x8000 SRAM

really need to increase SRAM size in ls2.py

diff --git a/Makefile b/Makefile
index bfcb0c46fc7e5d730012bc3c44b3ff490d632dc9..a60b7e806415f71a3260e21905220a4f4d6cca85 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -26,8 +26,8 @@ endif
 
 # Hello world
 MEMORY_SIZE=8192
-RAM_INIT_FILE=hello_world/hello_world.bin
-#RAM_INIT_FILE=coldboot/coldboot.bin
+#RAM_INIT_FILE=hello_world/hello_world.bin
+RAM_INIT_FILE=coldboot/coldboot.bin
 SIM_MAIN_BRAM=false
 
 # Micropython

diff --git a/coldboot/Makefile b/coldboot/Makefile
index 43a3dd0cfac8810960a5982302a3eb9dbf91951f..6b5d26f83ac9295117b8f98408ee1241aa9ad25e 100644 (file)
--- a/coldboot/Makefile
+++ b/coldboot/Makefile
@@ -74,7 +74,8 @@ coldboot.S: coldboot.elf
 
 
 clean:
-       @rm -f ../lib/*.o ../libgram/src/*.o *.o coldboot.elf coldboot.bin coldboot.hex coldboot.as coldboot.S powerpc.lds
+       @rm -f ../lib/*.o ../libgram/src/*.o *.o coldboot.elf coldboot.bin \
+       coldboot.hex coldboot.as coldboot.S powerpc.lds
 distclean: clean
        rm -f *~
 

diff --git a/coldboot/coldboot.c b/coldboot/coldboot.c
index 8f7559cdbffbf224f3237b8747362d640d2ca829..c9c029087a8ab3e0b643746e50201a8587cec479 100644 (file)
--- a/coldboot/coldboot.c
+++ b/coldboot/coldboot.c
@@ -491,6 +491,7 @@ int main(void) {
 #endif
        puts("done\n");
 
+#if 0 // ooo, annoying: won't work. no idea why
     // temporary hard-hack: boot directly from QSPI. really
     // should do something like detect at least... something
     if ((ftr & SYS_REG_INFO_HAS_SPI_FLASH))
@@ -500,11 +501,14 @@ int main(void) {
         __asm__ volatile("blr");
         return 0;
     }
+#endif
 
     // memcpy from SPI Flash then boot
     if ((ftr & SYS_REG_INFO_HAS_SPI_FLASH) &&
         (failcnt == 0))
     {
+/*
+        puts("ELF @ QSPI\n");
         // identify ELF, copy if present, and get the start address
         unsigned long faddr = copy_flash(spi_offs,
                                          0x600000); // hack!
@@ -516,6 +520,15 @@ int main(void) {
             // works with head.S which copies r3 into ctr then does bctr
             return faddr;
         }
+        puts("copy QSPI\n");
+*/
+        // another terrible hack: copy from flash at offset 0x600000
+        // a block of size 0x600000 into mem address 0x600000, then
+        // jump to it.  this allows a dtb image to be executed
+        uint32_t *mem = (uint32_t*)0x600000;
+        fl_read(mem, 0x600000, 0x600000);
+        mtspr(8, 0x600000); // move address to LR
+        __asm__ volatile("blr");
     }
 
        return 0;

diff --git a/coldboot/powerpc.lds.S b/coldboot/powerpc.lds.S
index 4063402de85d5cdc49e1e09c1a74d98cbdcc45ef..b673295c1f3bb0d1903d2b5122e2c3710780b846 100644 (file)
--- a/coldboot/powerpc.lds.S
+++ b/coldboot/powerpc.lds.S
@@ -22,6 +22,6 @@ SECTIONS
        }
        . = ALIGN(0x10);
        __bss_end = .;
-       . = . + 0x5500;
+       . = . + 0x5000;
        __stack_top = .;
 }

diff --git a/hello_world/Makefile b/hello_world/Makefile
index e1d6c983e8e066efec8d36ce99ef0ae9e4294681..88c2fb7ed1452a3469e8704b8e914f3fb259871b 100644 (file)
--- a/hello_world/Makefile
+++ b/hello_world/Makefile
@@ -5,8 +5,8 @@ ifneq ("$(ARCH)", "ppc64le")
 endif
 endif
 
-#BOOT_INIT_BASE ?= 0xf0000000 # at QSPI address
- BOOT_INIT_BASE ?= 0xff000000   # at ROM hi address (with coldboot firmware)
+BOOT_INIT_BASE ?= 0xf0000000 # at QSPI address
+# BOOT_INIT_BASE ?= 0xff000000   # at ROM hi address (with coldboot firmware)
 # BOOT_INIT_BASE ?= 0x0        # start at zero (usual)
 
 CC = $(CROSS_COMPILE)gcc