test trigger=1 in test 13

diff --git a/src/add/singlepipe.py b/src/add/singlepipe.py
index 2f5454289ad40cfe2c5604137a9a1a526cec4980..23589ef3fce0224d7badc9897d0c3d171305209a 100644 (file)
--- a/src/add/singlepipe.py
+++ b/src/add/singlepipe.py
@@ -701,7 +701,7 @@ class BufferedPipeline2(ControlBase):
 
         # previous valid and ready
         with self.m.If(p_i_valid_p_o_ready):
-                self.m.d.sync += [self.n.o_valid.eq(1),      # output valid
+            self.m.d.sync += [self.n.o_valid.eq(1),      # output valid
                                   eq(self.n.o_data, result), # update output
                                  ]
         # previous invalid or not ready, however next is accepting

diff --git a/src/add/test_buf_pipe.py b/src/add/test_buf_pipe.py
index 9fec02a71c3bb06f82373f7f5a0c31a32621de49..df63978c37c592435292121578697459e9cf2c58 100644 (file)
--- a/src/add/test_buf_pipe.py
+++ b/src/add/test_buf_pipe.py
@@ -654,14 +654,14 @@ def test12_resultfn(o_data, expected, i, o):
 # Test 13
 ######################################################################
 
-class ExampleUnBufDelayedPipe(BufferedPipeline):
+class ExampleUnBufDelayedPipe(BufferedPipeline2):
 
     def __init__(self):
-        stage = ExampleStageDelayCls()
-        BufferedPipeline.__init__(self, stage, stage_ctl=True)
+        stage = ExampleStageDelayCls(valid_trigger=1)
+        BufferedPipeline2.__init__(self, stage, stage_ctl=True)
 
     def elaborate(self, platform):
-        m = BufferedPipeline.elaborate(self, platform)
+        m = BufferedPipeline2.elaborate(self, platform)
         m.submodules.stage = self.stage
         return m