reduce args to FPAddStage0

diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index a14ad01d05129bf33ece7de87f7199fe3532d971..55438c2bad49a56f4f3ae718b59699c875639f79 100644 (file)
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -825,10 +825,10 @@ class FPAddStage0(FPState, FPID):
         self.mod = FPAddStage0Mod(width)
         self.o = self.mod.ospec()
 
-    def setup(self, m, in_a, in_b, in_mid):
+    def setup(self, m, i, in_mid):
         """ links module to inputs and outputs
         """
-        self.mod.setup(m, in_a, in_b)
+        self.mod.setup(m, i)
         if self.in_mid is not None:
             m.d.comb += self.in_mid.eq(in_mid)