rename myhdlgen import

diff --git a/src/myhdlgen/pins.py b/src/myhdlgen/pins.py
index 24ddd1e831275d6c9d6601a264f72c3f88268ee9..7a0ab3aaf33cd1e5328759c221cbf83402280f3f 100644 (file)
--- a/src/myhdlgen/pins.py
+++ b/src/myhdlgen/pins.py
@@ -227,7 +227,7 @@ def test_mux():
     tb.run_sim(66 * period)  # run for 15 clock cycle
 
 
-test = create_test()
+#test = create_test()
 
 
 if __name__ == '__main__':

diff --git a/src/pinmux_generator.py b/src/pinmux_generator.py
index 42a9381e2409cc4f51a4bc767319ea2dbc5406c3..3da90f1966f821974aaa591e86dbf7604aa72a63 100644 (file)
--- a/src/pinmux_generator.py
+++ b/src/pinmux_generator.py
@@ -22,7 +22,7 @@ import sys
 from spec import modules, specgen, dummytest
 
 from bsv.pinmux_generator import pinmuxgen as bsvgen
-from myhdl.pinmux_generator import pinmuxgen as myhdlgen
+from myhdlgen.pinmux_generator import pinmuxgen as myhdlgen
 
 
 def printhelp():