tidyup on read-flag latches

diff --git a/src/soc/simple/core.py b/src/soc/simple/core.py
index f24bcaa83f92a9f22f20194f867c275586ae591e..c00298ec5479c33600f2c8a796da95b7244a33f5 100644 (file)
--- a/src/soc/simple/core.py
+++ b/src/soc/simple/core.py
@@ -515,19 +515,24 @@ class NonProductionCore(ControlBase):
                 # get (or set up) a latched copy of read register number
                 # and (sigh) also the read-ok flag
                 rname = "%s_%s_%s_%d" % (funame, regfile, regname, pi)
+                rhname = "%s_%s_%d" % (regfile, regname, i)
                 read = Signal.like(_read, name="read_"+name)
-                rdflag = Signal(name="rdflag_"+rname, reset_less=True)
+                rdflag = Signal(name="rdflag_%s_%s" % (funame, rhname),
+                                reset_less=True)
+                if rhname not in fu.rf_latches:
+                    rfl = Signal(name="rdflag_latch_"+rname)
+                    fu.rf_latches[rhname] = rfl
+                    with m.If(fu.issue_i):
+                        sync += rfl.eq(rdflags[i])
+                else:
+                    rfl = fu.rf_latches[rhname]
                 if rname not in fu.rd_latches:
                     rdl = Signal.like(_read, name="rdlatch_"+rname)
-                    rfl = Signal(name="rdflag_latch_"+rname)
                     fu.rd_latches[rname] = rdl
-                    fu.rf_latches[rname] = rfl
                     with m.If(fu.issue_i):
                         sync += rdl.eq(_read)
-                        sync += rfl.eq(rdflags[i])
                 else:
                     rdl = fu.rd_latches[rname]
-                    rfl = fu.rf_latches[rname]
                 # latch to make the read immediately available on issue cycle
                 # after the read cycle, use the latched copy
                 with m.If(fu.issue_i):