add wishbone signals to gtkwave output

diff --git a/src/soc/simple/test/test_runner.py b/src/soc/simple/test/test_runner.py
index 3e22a8a01e19f651fe42407987d8c8c763322d09..77621ae0ceb54b52a2a514342050417863e1fb8f 100644 (file)
--- a/src/soc/simple/test/test_runner.py
+++ b/src/soc/simple/test/test_runner.py
@@ -376,7 +376,13 @@ class TestRunner(FHDLTestCase):
                 'core.fus.mmu0.alu_mmu0.debug0[3:0]',
                 'core.fus.mmu0.alu_mmu0.mmu.state',
                 'core.fus.mmu0.alu_mmu0.mmu.pid[31:0]',
-                'core.fus.mmu0.alu_mmu0.mmu.prtbl[63:0]'
+                'core.fus.mmu0.alu_mmu0.mmu.prtbl[63:0]',
+                {'comment': 'wishbone_memory'},
+                'core.fus.mmu0.alu_mmu0.dcache.stb',
+                'core.fus.mmu0.alu_mmu0.dcache.cyc',
+                'core.fus.mmu0.alu_mmu0.dcache.we',
+                'core.fus.mmu0.alu_mmu0.dcache.ack',
+                'core.fus.mmu0.alu_mmu0.dcache.stall,'
             ]
 
         write_gtkw("issuer_simulator.gtkw",