#define IRIS_MAX_SSBOS 16
#define IRIS_MAX_VIEWPORTS 16
#define IRIS_MAX_CLIP_PLANES 8
+#define IRIS_MAX_GLOBAL_BINDINGS 32
enum iris_param_domain {
BRW_PARAM_DOMAIN_BUILTIN = 0,
/** Do any samplers need border color? One bit per shader stage. */
uint8_t need_border_colors;
+ /** Global resource bindings */
+ struct pipe_resource *global_bindings[IRIS_MAX_GLOBAL_BINDINGS];
+
struct pipe_stream_output_target *so_target[PIPE_MAX_SO_BUFFERS];
bool streamout_active;
assert(count == 0);
}
+static void
+iris_set_global_binding(struct pipe_context *ctx,
+ unsigned start_slot, unsigned count,
+ struct pipe_resource **resources,
+ uint32_t **handles)
+{
+ struct iris_context *ice = (struct iris_context *) ctx;
+
+ assert(start_slot + count <= IRIS_MAX_GLOBAL_BINDINGS);
+ for (unsigned i = 0; i < count; i++) {
+ if (resources && resources[i]) {
+ pipe_resource_reference(&ice->state.global_bindings[start_slot + i],
+ resources[i]);
+ struct iris_resource *res = (void *) resources[i];
+ uint64_t addr = res->bo->gtt_offset;
+ memcpy(handles[i], &addr, sizeof(addr));
+ } else {
+ pipe_resource_reference(&ice->state.global_bindings[start_slot + i],
+ NULL);
+ }
+ }
+
+ ice->state.stage_dirty |= IRIS_STAGE_DIRTY_BINDINGS_CS;
+}
+
/**
* The pipe->set_tess_state() driver hook.
*/
}
}
+ for (unsigned i = 0; i < IRIS_MAX_GLOBAL_BINDINGS; i++) {
+ struct pipe_resource *res = ice->state.global_bindings[i];
+ if (!res)
+ continue;
+
+ iris_use_pinned_bo(batch, iris_resource_bo(res),
+ true, IRIS_DOMAIN_NONE);
+ }
+
if (stage_dirty & (IRIS_STAGE_DIRTY_SAMPLER_STATES_CS |
IRIS_STAGE_DIRTY_BINDINGS_CS |
IRIS_STAGE_DIRTY_CONSTANTS_CS |
ctx->set_shader_images = iris_set_shader_images;
ctx->set_sampler_views = iris_set_sampler_views;
ctx->set_compute_resources = iris_set_compute_resources;
+ ctx->set_global_binding = iris_set_global_binding;
ctx->set_tess_state = iris_set_tess_state;
ctx->set_framebuffer_state = iris_set_framebuffer_state;
ctx->set_polygon_stipple = iris_set_polygon_stipple;