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Fix line length
author
Michael Nolan
<mtnolan2640@gmail.com>
Mon, 10 Feb 2020 16:27:42 +0000
(11:27 -0500)
committer
Michael Nolan
<mtnolan2640@gmail.com>
Mon, 10 Feb 2020 16:27:42 +0000
(11:27 -0500)
src/ieee754/part/test/test_partsig.py
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diff --git
a/src/ieee754/part/test/test_partsig.py
b/src/ieee754/part/test/test_partsig.py
index b209aec18a5ab582f802ffb138fbbd057a045d41..699a34f9caaf001a14c73c60bced4a8d1916c3b4 100644
(file)
--- a/
src/ieee754/part/test/test_partsig.py
+++ b/
src/ieee754/part/test/test_partsig.py
@@
-149,7
+149,8
@@
class TestPartitionPoints(unittest.TestCase):
c_outval = (yield getattr(module,
"%s_carry_out" % mod_attr))
msg = f"{msg_prefix}: 0x{a:X} + 0x{b:X}" + \
- f" => 0x{carry_result:X} != 0x{c_outval:X} ({mod_attr})"
+ f" => 0x{carry_result:X} != 0x{c_outval:X}" + \
+ " ({mod_attr})"
self.assertEqual(carry_result, c_outval, msg)
for (test_fn, mod_attr) in ((test_add_fn, "add"),