dev-arm: VExpress_GEM5_Base, add refclock 32KHz

This patch adds the reference 32KHz clock to VExpress_GEM5_Base derived
platforms. This is in preparation for supporting the SP805 Watchdog.
I/O voltage domain and platform clock domain coupling is transferred
to the __init__ method for correctness.

Change-Id: Ic743fd986793f1e43b75fa60260c9b43b2737763
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24204
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index e65f118c196f708c68bea8b16c8437fcbb1814c0..e773096b7c93f1dd3bb05a514ea27f21e5f80d06 100644 (file)
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2009-2019 ARM Limited
+# Copyright (c) 2009-2020 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -959,8 +959,9 @@ Interrupts:
         return memories
 
     ### Off-chip devices ###
-    clock24MHz = SrcClockDomain(clock="24MHz",
-        voltage_domain=VoltageDomain(voltage="3.3V"))
+    io_voltage = VoltageDomain(voltage="3.3V")
+    clock32KHz = SrcClockDomain(clock="32kHz")
+    clock24MHz = SrcClockDomain(clock="24MHz")
 
     uart = [
         Pl011(pio_addr=0x1c090000, int_num=37),
@@ -995,11 +996,17 @@ Interrupts:
             self.rtc,
             self.pci_host,
             self.energy_ctrl,
+            self.clock32KHz,
             self.clock24MHz,
             self.vio[0],
             self.vio[1],
         ]
 
+    def __init__(self, **kwargs):
+        super(VExpress_GEM5_Base, self).__init__(**kwargs)
+        self.clock32KHz.voltage_domain = self.io_voltage
+        self.clock24MHz.voltage_domain = self.io_voltage
+
     def attachPciDevice(self, device, *args, **kwargs):
         device.host = self.pci_host
         self._num_pci_dev += 1