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fix memory issue in yosys synth for icarus
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Mon, 28 Feb 2022 17:43:59 +0000
(17:43 +0000)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Mon, 28 Feb 2022 17:43:59 +0000
(17:43 +0000)
simsoc.ys
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diff --git
a/simsoc.ys
b/simsoc.ys
index 3bd115f6fbc2be8b98d29480a26a550d99012e59..be21ccbb467cac02112fb8c4a07a66812b1c684e 100644
(file)
--- a/
simsoc.ys
+++ b/
simsoc.ys
@@
-14,6
+14,8
@@
read_verilog ../uart16550/rtl/verilog/uart_wb.v
read_verilog ./external_core_top.v
delete w:$verilog_initial_trigger
+proc
+memory
proc_prune
proc_clean
proc_rmdead
@@
-25,7
+27,11
@@
proc_mux
proc_rmdead
proc_clean
pmuxtree
-memory_collect
+#opt_mem
+#opt_mem_priority
+#opt_mem_feedback
+#opt_clean
+#memory_collect
extract_fa
clean
opt