Fix typo in mmu.py

diff --git a/src/soc/experiment/mmu.py b/src/soc/experiment/mmu.py
index 96a60d45292fb741596a1a98d5207173e0c5779f..cf54b7a7c9ed0b67c6a959579377c9f8fbcb2465 100644 (file)
--- a/src/soc/experiment/mmu.py
+++ b/src/soc/experiment/mmu.py
@@ -800,7 +800,7 @@ class MMU1(Elaboratable):
 #                           not finalmask(30 downto 0));
                 comb += mbits.eq(0 & r.mask_size)
                 comb += v.shift.eq(r.shift + (31 -12) - mbits)
-                # TODO need lckl to check this is correct
+                # TODO need lkcl to check this is correct
                 comb += nonzero.eq(0 | Cat((~finalmask[0:31]),
                                    r.addr[31:62]
                                   ))