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remove minerva cpu
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 16 Feb 2022 14:20:19 +0000 (14:20 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 16 Feb 2022 14:20:19 +0000 (14:20 +0000)
src/ls2.py patch | blob | history

diff --git a/src/ls2.py b/src/ls2.py
index 78e4399413d09537c37fd16d8c5be4c7327d0611..a904ee7d8e02cc0835ae5fba8eacc1abb9803f97 100644 (file)
--- a/src/ls2.py
+++ b/src/ls2.py
@@ -15,7 +15,6 @@ from nmigen_soc.memory import MemoryMap
 
 from nmigen_stdio.serial import AsyncSerial
 
-from lambdasoc.cpu.minerva import MinervaCPU
 from lambdasoc.periph.intc import GenericInterruptController
 from lambdasoc.periph.sram import SRAMPeripheral
 from lambdasoc.periph.timer import TimerPeripheral