sigh spelling
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 11 Jul 2020 21:48:58 +0000 (22:48 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 11 Jul 2020 21:48:58 +0000 (22:48 +0100)
src/soc/fu/ldst/test/test_pipe_caller.py

index 88671f493ff9a6fe12bd84f09410d9a2b9f8385d..77eb1a4c531a44100e47d9eaecacb2d95844445c 100644 (file)
@@ -72,7 +72,7 @@ class LDSTTestCase(FHDLTestCase):
                        0x0008: (0xabcdef0187654321, 8),
                        0x0020: (0x1828384822324252, 8),
                         }
-        self.run_tst_program(Program(list, bigendian), initial_regs,
+        self.run_tst_program(Program(lst, bigendian), initial_regs,
                              initial_mem=initial_mem)
 
     def test_2_load_store(self):
@@ -88,7 +88,7 @@ class LDSTTestCase(FHDLTestCase):
                        0x0008: (0xabcdef0187654321, 8),
                        0x0020: (0x1828384822324252, 8),
                         }
-        self.run_tst_program(Program(list, bigendian), initial_regs,
+        self.run_tst_program(Program(lst, bigendian), initial_regs,
                              initial_mem=initial_mem)
 
     def test_3_load_store(self):
@@ -102,7 +102,7 @@ class LDSTTestCase(FHDLTestCase):
                        0x0008: (0xabcdef0187654321, 8),
                        0x0020: (0x1828384822324252, 8),
                         }
-        self.run_tst_program(Program(list, bigendian), initial_regs,
+        self.run_tst_program(Program(lst, bigendian), initial_regs,
                              initial_mem=initial_mem)
 
     def test_4_load_store_rev_ext(self):
@@ -116,7 +116,7 @@ class LDSTTestCase(FHDLTestCase):
                        0x0008: (0xabcdef0187654321, 8),
                        0x0020: (0x1828384822324252, 8),
                         }
-        self.run_tst_program(Program(list, bigendian), initial_regs,
+        self.run_tst_program(Program(lst, bigendian), initial_regs,
                              initial_mem=initial_mem)
 
     def test_5_load_store_rev_ext(self):
@@ -130,7 +130,7 @@ class LDSTTestCase(FHDLTestCase):
                        0x0008: (0xabcdef0187654321, 8),
                        0x0020: (0x1828384822324252, 8),
                         }
-        self.run_tst_program(Program(list, bigendian), initial_regs,
+        self.run_tst_program(Program(lst, bigendian), initial_regs,
                              initial_mem=initial_mem)
 
     def test_6_load_store_rev_ext(self):
@@ -144,6 +144,6 @@ class LDSTTestCase(FHDLTestCase):
                        0x0008: (0xabcdef0187654321, 8),
                        0x0020: (0x1828384822324252, 8),
                         }
-        self.run_tst_program(Program(list, bigendian), initial_regs,
+        self.run_tst_program(Program(lst, bigendian), initial_regs,
                              initial_mem=initial_mem)