GLuint lodbias_tm0s3[MAX_TEXTURE_UNITS];
DECLARE_RENDERINPUTS(last_index_bitset);
- struct i830_hw_state initial, state, *current;
+ struct i830_hw_state state;
};
_mesa_init_driver_state(ctx);
- memcpy(&i830->initial, &i830->state, sizeof(i830->state));
-
- i830->current = &i830->state;
i830->state.emitted = 0;
i830->state.active = (I830_UPLOAD_INVARIENT |
I830_UPLOAD_RASTER_RULES |
i830_check_vertex_size(struct intel_context *intel, GLuint expected)
{
struct i830_context *i830 = i830_context(&intel->ctx);
- int vft0 = i830->current->Ctx[I830_CTXREG_VF];
- int vft1 = i830->current->Ctx[I830_CTXREG_VF2];
+ int vft0 = i830->state.Ctx[I830_CTXREG_VF];
+ int vft1 = i830->state.Ctx[I830_CTXREG_VF2];
int nrtex = (vft0 & VFT0_TEX_COUNT_MASK) >> VFT0_TEX_COUNT_SHIFT;
int i, sz = 0;
i830_emit_state(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
- struct i830_hw_state *state = i830->current;
+ struct i830_hw_state *state = &i830->state;
int i, count;
GLuint dirty;
dri_bo *aper_array[3 + I830_TEX_UNITS];
intel_region_release(&i830->state.draw_region);
intel_region_release(&i830->state.depth_region);
- intel_region_release(&i830->initial.draw_region);
- intel_region_release(&i830->initial.depth_region);
for (i = 0; i < I830_TEX_UNITS; i++) {
if (i830->state.tex_buffer[i] != NULL) {
i830_assert_not_dirty( struct intel_context *intel )
{
struct i830_context *i830 = i830_context(&intel->ctx);
- struct i830_hw_state *state = i830->current;
- assert(!get_dirty(state));
+ assert(!get_dirty(&i830->state));
}
static void
struct i915_fragment_program *current_program;
- struct i915_hw_state initial, state, *current;
+ struct i915_hw_state state;
};
i915_init_packets(i915);
_mesa_init_driver_state(ctx);
-
- memcpy(&i915->initial, &i915->state, sizeof(i915->state));
- i915->current = &i915->state;
}
i915_check_vertex_size(struct intel_context *intel, GLuint expected)
{
struct i915_context *i915 = i915_context(&intel->ctx);
- int lis2 = i915->current->Ctx[I915_CTXREG_LIS2];
- int lis4 = i915->current->Ctx[I915_CTXREG_LIS4];
+ int lis2 = i915->state.Ctx[I915_CTXREG_LIS2];
+ int lis4 = i915->state.Ctx[I915_CTXREG_LIS4];
int i, sz = 0;
switch (lis4 & S4_VFMT_XYZW_MASK) {
i915_emit_state(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);
- struct i915_hw_state *state = i915->current;
+ struct i915_hw_state *state = &i915->state;
int i, count, aper_count;
GLuint dirty;
dri_bo *aper_array[3 + I915_TEX_UNITS];
intel_region_release(&i915->state.draw_region);
intel_region_release(&i915->state.depth_region);
- intel_region_release(&i915->initial.draw_region);
- intel_region_release(&i915->initial.depth_region);
for (i = 0; i < I915_TEX_UNITS; i++) {
if (i915->state.tex_buffer[i] != NULL) {
i915_assert_not_dirty( struct intel_context *intel )
{
struct i915_context *i915 = i915_context(&intel->ctx);
- struct i915_hw_state *state = i915->current;
- GLuint dirty = get_dirty(state);
+ GLuint dirty = get_dirty(&i915->state);
assert(!dirty);
}